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https://git.suyu.dev/suyu/suyu.git
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emitter: Remove unnecessary inline specifiers
Functions implemented in a class definition are already implicitly inline.
This commit is contained in:
parent
21ba05e5f1
commit
0609b89f74
1 changed files with 33 additions and 33 deletions
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@ -361,10 +361,10 @@ private:
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void ABI_CalculateFrameSize(u32 mask, size_t rsp_alignment, size_t needed_frame_size, size_t* shadowp, size_t* subtractionp, size_t* xmm_offsetp);
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void ABI_CalculateFrameSize(u32 mask, size_t rsp_alignment, size_t needed_frame_size, size_t* shadowp, size_t* subtractionp, size_t* xmm_offsetp);
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protected:
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protected:
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inline void Write8(u8 value) {*code++ = value;}
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void Write8(u8 value) {*code++ = value;}
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inline void Write16(u16 value) {*(u16*)code = (value); code += 2;}
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void Write16(u16 value) {*(u16*)code = (value); code += 2;}
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inline void Write32(u32 value) {*(u32*)code = (value); code += 4;}
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void Write32(u32 value) {*(u32*)code = (value); code += 4;}
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inline void Write64(u64 value) {*(u64*)code = (value); code += 8;}
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void Write64(u64 value) {*(u64*)code = (value); code += 8;}
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public:
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public:
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XEmitter() { code = nullptr; flags_locked = false; }
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XEmitter() { code = nullptr; flags_locked = false; }
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@ -496,11 +496,11 @@ public:
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// Extend EAX into EDX in various ways
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// Extend EAX into EDX in various ways
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void CWD(int bits = 16);
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void CWD(int bits = 16);
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inline void CDQ() {CWD(32);}
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void CDQ() {CWD(32);}
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inline void CQO() {CWD(64);}
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void CQO() {CWD(64);}
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void CBW(int bits = 8);
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void CBW(int bits = 8);
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inline void CWDE() {CBW(16);}
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void CWDE() {CBW(16);}
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inline void CDQE() {CBW(32);}
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void CDQE() {CBW(32);}
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// Load effective address
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// Load effective address
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void LEA(int bits, X64Reg dest, OpArg src);
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void LEA(int bits, X64Reg dest, OpArg src);
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@ -596,13 +596,13 @@ public:
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void CMPSS(X64Reg regOp, OpArg arg, u8 compare);
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void CMPSS(X64Reg regOp, OpArg arg, u8 compare);
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void CMPSD(X64Reg regOp, OpArg arg, u8 compare);
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void CMPSD(X64Reg regOp, OpArg arg, u8 compare);
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inline void CMPEQSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_EQ); }
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void CMPEQSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_EQ); }
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inline void CMPLTSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_LT); }
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void CMPLTSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_LT); }
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inline void CMPLESS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_LE); }
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void CMPLESS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_LE); }
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inline void CMPUNORDSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_UNORD); }
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void CMPUNORDSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_UNORD); }
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inline void CMPNEQSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_NEQ); }
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void CMPNEQSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_NEQ); }
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inline void CMPNLTSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_NLT); }
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void CMPNLTSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_NLT); }
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inline void CMPORDSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_ORD); }
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void CMPORDSS(X64Reg regOp, OpArg arg) { CMPSS(regOp, arg, CMP_ORD); }
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// SSE/SSE2: Floating point packed arithmetic (x4 for float, x2 for double)
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// SSE/SSE2: Floating point packed arithmetic (x4 for float, x2 for double)
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void ADDPS(X64Reg regOp, OpArg arg);
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void ADDPS(X64Reg regOp, OpArg arg);
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@ -859,25 +859,25 @@ public:
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void ROUNDPS(X64Reg dest, OpArg arg, u8 mode);
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void ROUNDPS(X64Reg dest, OpArg arg, u8 mode);
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void ROUNDPD(X64Reg dest, OpArg arg, u8 mode);
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void ROUNDPD(X64Reg dest, OpArg arg, u8 mode);
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inline void ROUNDNEARSS(X64Reg dest, OpArg arg) { ROUNDSS(dest, arg, FROUND_NEAREST); }
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void ROUNDNEARSS(X64Reg dest, OpArg arg) { ROUNDSS(dest, arg, FROUND_NEAREST); }
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inline void ROUNDFLOORSS(X64Reg dest, OpArg arg) { ROUNDSS(dest, arg, FROUND_FLOOR); }
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void ROUNDFLOORSS(X64Reg dest, OpArg arg) { ROUNDSS(dest, arg, FROUND_FLOOR); }
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inline void ROUNDCEILSS(X64Reg dest, OpArg arg) { ROUNDSS(dest, arg, FROUND_CEIL); }
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void ROUNDCEILSS(X64Reg dest, OpArg arg) { ROUNDSS(dest, arg, FROUND_CEIL); }
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inline void ROUNDZEROSS(X64Reg dest, OpArg arg) { ROUNDSS(dest, arg, FROUND_ZERO); }
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void ROUNDZEROSS(X64Reg dest, OpArg arg) { ROUNDSS(dest, arg, FROUND_ZERO); }
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inline void ROUNDNEARSD(X64Reg dest, OpArg arg) { ROUNDSD(dest, arg, FROUND_NEAREST); }
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void ROUNDNEARSD(X64Reg dest, OpArg arg) { ROUNDSD(dest, arg, FROUND_NEAREST); }
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inline void ROUNDFLOORSD(X64Reg dest, OpArg arg) { ROUNDSD(dest, arg, FROUND_FLOOR); }
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void ROUNDFLOORSD(X64Reg dest, OpArg arg) { ROUNDSD(dest, arg, FROUND_FLOOR); }
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inline void ROUNDCEILSD(X64Reg dest, OpArg arg) { ROUNDSD(dest, arg, FROUND_CEIL); }
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void ROUNDCEILSD(X64Reg dest, OpArg arg) { ROUNDSD(dest, arg, FROUND_CEIL); }
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inline void ROUNDZEROSD(X64Reg dest, OpArg arg) { ROUNDSD(dest, arg, FROUND_ZERO); }
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void ROUNDZEROSD(X64Reg dest, OpArg arg) { ROUNDSD(dest, arg, FROUND_ZERO); }
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inline void ROUNDNEARPS(X64Reg dest, OpArg arg) { ROUNDPS(dest, arg, FROUND_NEAREST); }
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void ROUNDNEARPS(X64Reg dest, OpArg arg) { ROUNDPS(dest, arg, FROUND_NEAREST); }
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inline void ROUNDFLOORPS(X64Reg dest, OpArg arg) { ROUNDPS(dest, arg, FROUND_FLOOR); }
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void ROUNDFLOORPS(X64Reg dest, OpArg arg) { ROUNDPS(dest, arg, FROUND_FLOOR); }
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inline void ROUNDCEILPS(X64Reg dest, OpArg arg) { ROUNDPS(dest, arg, FROUND_CEIL); }
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void ROUNDCEILPS(X64Reg dest, OpArg arg) { ROUNDPS(dest, arg, FROUND_CEIL); }
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inline void ROUNDZEROPS(X64Reg dest, OpArg arg) { ROUNDPS(dest, arg, FROUND_ZERO); }
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void ROUNDZEROPS(X64Reg dest, OpArg arg) { ROUNDPS(dest, arg, FROUND_ZERO); }
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inline void ROUNDNEARPD(X64Reg dest, OpArg arg) { ROUNDPD(dest, arg, FROUND_NEAREST); }
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void ROUNDNEARPD(X64Reg dest, OpArg arg) { ROUNDPD(dest, arg, FROUND_NEAREST); }
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inline void ROUNDFLOORPD(X64Reg dest, OpArg arg) { ROUNDPD(dest, arg, FROUND_FLOOR); }
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void ROUNDFLOORPD(X64Reg dest, OpArg arg) { ROUNDPD(dest, arg, FROUND_FLOOR); }
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inline void ROUNDCEILPD(X64Reg dest, OpArg arg) { ROUNDPD(dest, arg, FROUND_CEIL); }
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void ROUNDCEILPD(X64Reg dest, OpArg arg) { ROUNDPD(dest, arg, FROUND_CEIL); }
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inline void ROUNDZEROPD(X64Reg dest, OpArg arg) { ROUNDPD(dest, arg, FROUND_ZERO); }
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void ROUNDZEROPD(X64Reg dest, OpArg arg) { ROUNDPD(dest, arg, FROUND_ZERO); }
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// AVX
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// AVX
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void VADDSD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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void VADDSD(X64Reg regOp1, X64Reg regOp2, OpArg arg);
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@ -1048,9 +1048,9 @@ public:
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void ABI_EmitEpilogue(int maxCallParams);
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void ABI_EmitEpilogue(int maxCallParams);
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#ifdef _M_IX86
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#ifdef _M_IX86
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inline int ABI_GetNumXMMRegs() { return 8; }
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static int ABI_GetNumXMMRegs() { return 8; }
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#else
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#else
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inline int ABI_GetNumXMMRegs() { return 16; }
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static int ABI_GetNumXMMRegs() { return 16; }
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#endif
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#endif
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}; // class XEmitter
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}; // class XEmitter
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