mirror of
https://git.suyu.dev/suyu/suyu.git
synced 2024-12-24 01:10:56 +01:00
shader_decode: Stub RRO_C, RRO_R and RRO_IMM
This commit is contained in:
parent
5e6a0a08c1
commit
06cb910c6d
1 changed files with 9 additions and 0 deletions
|
@ -140,6 +140,15 @@ u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, u32 pc) {
|
|||
Operation(OperationCode::Select, NO_PRECISE, condition, min, max));
|
||||
break;
|
||||
}
|
||||
case OpCode::Id::RRO_C:
|
||||
case OpCode::Id::RRO_R:
|
||||
case OpCode::Id::RRO_IMM: {
|
||||
// Currently RRO is only implemented as a register move.
|
||||
op_b = GetOperandAbsNegFloat(op_b, instr.alu.abs_b, instr.alu.negate_b);
|
||||
SetRegister(bb, instr.gpr0, op_b);
|
||||
LOG_WARNING(HW_GPU, "RRO instruction is incomplete");
|
||||
break;
|
||||
}
|
||||
default:
|
||||
UNIMPLEMENTED_MSG("Unhandled arithmetic instruction: {}", opcode->get().GetName());
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue