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maxwell_dma: Minor refactoring

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This commit is contained in:
ameerj 2021-09-19 20:36:41 -04:00
parent 1ea8073783
commit 24049591f6
2 changed files with 33 additions and 33 deletions
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64
src/video_core/engines/maxwell_dma.cpp
View file

@ -82,41 +82,41 @@ void MaxwellDMA::Launch() {
}
void MaxwellDMA::CopyPitchToPitch() {
// When `multi_line_enable` bit is disabled the copy is performed as if we were copying a 1D
// buffer of length `line_length_in`.
// Otherwise we copy a 2D image of dimensions (line_length_in, line_count).
auto& accelerate = rasterizer->AccessAccelerateDMA();
if (!regs.launch_dma.multi_line_enable) {
const bool is_buffer_clear = regs.launch_dma.remap_enable != 0 &&
regs.remap_const.dst_x == RemapConst::Swizzle::CONST_A;
// TODO: allow multisized components.
if (is_buffer_clear) {
ASSERT(regs.remap_const.component_size_minus_one == 3);
accelerate.BufferClear(regs.offset_out, regs.line_length_in, regs.remap_consta_value);
std::vector<u32> tmp_buffer(regs.line_length_in, regs.remap_consta_value);
memory_manager.WriteBlockUnsafe(regs.offset_out,
reinterpret_cast<u8*>(tmp_buffer.data()),
regs.line_length_in * sizeof(u32));
return;
}
UNIMPLEMENTED_IF(regs.launch_dma.remap_enable != 0);
if (!accelerate.BufferCopy(regs.offset_in, regs.offset_out, regs.line_length_in)) {
std::vector<u8> tmp_buffer(regs.line_length_in);
memory_manager.ReadBlockUnsafe(regs.offset_in, tmp_buffer.data(), regs.line_length_in);
memory_manager.WriteBlock(regs.offset_out, tmp_buffer.data(), regs.line_length_in);
// When `multi_line_enable` bit is enabled we copy a 2D image of dimensions
// (line_length_in, line_count).
// Otherwise the copy is performed as if we were copying a 1D buffer of length line_length_in.
const bool remap_enabled = regs.launch_dma.remap_enable != 0;
if (regs.launch_dma.multi_line_enable) {
UNIMPLEMENTED_IF(remap_enabled);
// Perform a line-by-line copy.
// We're going to take a subrect of size (line_length_in, line_count) from the source
// rectangle. There is no need to manually flush/invalidate the regions because CopyBlock
// does that for us.
for (u32 line = 0; line < regs.line_count; ++line) {
const GPUVAddr source_line = regs.offset_in + static_cast<size_t>(line) * regs.pitch_in;
const GPUVAddr dest_line = regs.offset_out + static_cast<size_t>(line) * regs.pitch_out;
memory_manager.CopyBlock(dest_line, source_line, regs.line_length_in);
}
return;
}
UNIMPLEMENTED_IF(regs.launch_dma.remap_enable != 0);
// Perform a line-by-line copy.
// We're going to take a subrect of size (line_length_in, line_count) from the source rectangle.
// There is no need to manually flush/invalidate the regions because CopyBlock does that for us.
for (u32 line = 0; line < regs.line_count; ++line) {
const GPUVAddr source_line = regs.offset_in + static_cast<size_t>(line) * regs.pitch_in;
const GPUVAddr dest_line = regs.offset_out + static_cast<size_t>(line) * regs.pitch_out;
memory_manager.CopyBlock(dest_line, source_line, regs.line_length_in);
// TODO: allow multisized components.
auto& accelerate = rasterizer->AccessAccelerateDMA();
const bool is_const_a_dst = regs.remap_const.dst_x == RemapConst::Swizzle::CONST_A;
const bool is_buffer_clear = remap_enabled && is_const_a_dst;
if (is_buffer_clear) {
ASSERT(regs.remap_const.component_size_minus_one == 3);
accelerate.BufferClear(regs.offset_out, regs.line_length_in, regs.remap_consta_value);
std::vector<u32> tmp_buffer(regs.line_length_in, regs.remap_consta_value);
memory_manager.WriteBlockUnsafe(regs.offset_out, reinterpret_cast<u8*>(tmp_buffer.data()),
regs.line_length_in * sizeof(u32));
return;
}
UNIMPLEMENTED_IF(remap_enabled);
if (!accelerate.BufferCopy(regs.offset_in, regs.offset_out, regs.line_length_in)) {
std::vector<u8> tmp_buffer(regs.line_length_in);
memory_manager.ReadBlockUnsafe(regs.offset_in, tmp_buffer.data(), regs.line_length_in);
memory_manager.WriteBlock(regs.offset_out, tmp_buffer.data(), regs.line_length_in);
}
}

2
src/video_core/engines/maxwell_dma.h
View file

@ -175,7 +175,7 @@ public:
static_assert(sizeof(LaunchDMA) == 4);
struct RemapConst {
enum Swizzle : u32 {
enum class Swizzle : u32 {
SRC_X = 0,
SRC_Y = 1,
SRC_Z = 2,