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core/memory: Amend address widths in asserts
Addresses are 64-bit, these formatting specifiers are simply holdovers from citra. Adjust them to be the correct width.
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parent
59dae03dbe
commit
6d00780045
1 changed files with 2 additions and 2 deletions
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@ -172,7 +172,7 @@ T Read(const VAddr vaddr) {
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NGLOG_ERROR(HW_Memory, "Unmapped Read{} @ {:#010X}", sizeof(T) * 8, vaddr);
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return 0;
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case PageType::Memory:
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ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
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ASSERT_MSG(false, "Mapped memory page without a pointer @ %016" PRIX64, vaddr);
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break;
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case PageType::RasterizerCachedMemory: {
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RasterizerFlushVirtualRegion(vaddr, sizeof(T), FlushMode::Flush);
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@ -205,7 +205,7 @@ void Write(const VAddr vaddr, const T data) {
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vaddr);
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return;
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case PageType::Memory:
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ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
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ASSERT_MSG(false, "Mapped memory page without a pointer @ %016" PRIX64, vaddr);
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break;
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case PageType::RasterizerCachedMemory: {
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RasterizerFlushVirtualRegion(vaddr, sizeof(T), FlushMode::Invalidate);
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