mirror of
https://git.suyu.dev/suyu/suyu.git
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MacroHLE: Add MultidrawIndirect HLE Macro.
This commit is contained in:
Fernando Sahmkow
parent
a12a4f2a13
commit
a5a94f52ff
13 changed files with 169 additions and 47 deletions
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@ -170,6 +170,9 @@ public:
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void BindComputeTextureBuffer(size_t tbo_index, GPUVAddr gpu_addr, u32 size, PixelFormat format,
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bool is_written, bool is_image);
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[[nodiscard]] std::pair<Buffer*, u32> ObtainBuffer(GPUVAddr gpu_addr, u32 size,
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bool synchronize, bool mark_as_written);
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void FlushCachedWrites();
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/// Return true when there are uncommitted buffers to be downloaded
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@ -790,6 +793,25 @@ void BufferCache<P>::BindComputeTextureBuffer(size_t tbo_index, GPUVAddr gpu_add
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compute_texture_buffers[tbo_index] = GetTextureBufferBinding(gpu_addr, size, format);
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}
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template <class P>
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std::pair<typename P::Buffer*, u32> BufferCache<P>::ObtainBuffer(GPUVAddr gpu_addr, u32 size,
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bool synchronize,
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bool mark_as_written) {
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const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr);
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if (!cpu_addr) {
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return {&slot_buffers[NULL_BUFFER_ID], 0};
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}
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const BufferId buffer_id = FindBuffer(*cpu_addr, size);
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Buffer& buffer = slot_buffers[buffer_id];
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if (synchronize) {
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SynchronizeBuffer(buffer, *cpu_addr, size);
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}
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if (mark_as_written) {
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MarkWrittenBuffer(buffer_id, *cpu_addr, size);
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}
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return {&buffer, buffer.Offset(*cpu_addr)};
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}
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template <class P>
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void BufferCache<P>::FlushCachedWrites() {
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for (const BufferId buffer_id : cached_write_buffer_ids) {
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@ -61,7 +61,7 @@ bool DmaPusher::Step() {
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} else {
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const CommandListHeader command_list_header{
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command_list.command_lists[dma_pushbuffer_subindex++]};
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const GPUVAddr dma_get = command_list_header.addr;
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dma_state.dma_get = command_list_header.addr;
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if (dma_pushbuffer_subindex >= command_list.command_lists.size()) {
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// We've gone through the current list, remove it from the queue
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@ -75,11 +75,11 @@ bool DmaPusher::Step() {
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// Push buffer non-empty, read a word
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command_headers.resize_destructive(command_list_header.size);
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if (Settings::IsGPULevelHigh()) {
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memory_manager.ReadBlock(dma_get, command_headers.data(),
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if (Settings::IsGPULevelExtreme()) {
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memory_manager.ReadBlock(dma_state.dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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} else {
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memory_manager.ReadBlockUnsafe(dma_get, command_headers.data(),
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memory_manager.ReadBlockUnsafe(dma_state.dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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}
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ProcessCommands(command_headers);
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@ -174,8 +174,10 @@ void DmaPusher::CallMultiMethod(const u32* base_start, u32 num_methods) const {
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puller.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods,
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dma_state.method_count);
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} else {
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subchannels[dma_state.subchannel]->CallMultiMethod(dma_state.method, base_start,
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num_methods, dma_state.method_count);
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auto subchannel = subchannels[dma_state.subchannel];
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subchannel->current_dma_segment = dma_state.dma_get;
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subchannel->CallMultiMethod(dma_state.method, base_start, num_methods,
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dma_state.method_count);
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}
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}
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@ -156,6 +156,7 @@ private:
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u32 subchannel; ///< Current subchannel
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u32 method_count; ///< Current method count
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u32 length_pending; ///< Large NI command length pending
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GPUVAddr dma_get; ///< Currently read segment
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bool non_incrementing; ///< Current command's NI flag
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bool is_last_call;
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};
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@ -91,6 +91,16 @@ void DrawManager::DrawIndex(PrimitiveTopology topology, u32 index_first, u32 ind
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ProcessDraw(true, num_instances);
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}
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void DrawManager::DrawIndexedIndirect(PrimitiveTopology topology, u32 index_first, u32 index_count) {
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const auto& regs{maxwell3d->regs};
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draw_state.topology = topology;
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draw_state.index_buffer = regs.index_buffer;
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draw_state.index_buffer.first = index_first;
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draw_state.index_buffer.count = index_count;
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ProcessDrawIndirect(true);
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}
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void DrawManager::SetInlineIndexBuffer(u32 index) {
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draw_state.inline_index_draw_indexes.push_back(static_cast<u8>(index & 0x000000ff));
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draw_state.inline_index_draw_indexes.push_back(static_cast<u8>((index & 0x0000ff00) >> 8));
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@ -198,4 +208,15 @@ void DrawManager::ProcessDraw(bool draw_indexed, u32 instance_count) {
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maxwell3d->rasterizer->Draw(draw_indexed, instance_count);
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}
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}
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void DrawManager::ProcessDrawIndirect(bool draw_indexed) {
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LOG_TRACE(HW_GPU, "called, topology={}, count={}", draw_state.topology,
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draw_indexed ? draw_state.index_buffer.count : draw_state.vertex_buffer.count);
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UpdateTopology();
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if (maxwell3d->ShouldExecute()) {
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maxwell3d->rasterizer->DrawIndirect(draw_indexed);
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}
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}
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} // namespace Tegra::Engines
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@ -32,6 +32,13 @@ public:
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std::vector<u8> inline_index_draw_indexes;
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};
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struct IndirectParams {
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GPUVAddr start_address;
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size_t buffer_size;
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size_t max_draw_counts;
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size_t stride;
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};
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explicit DrawManager(Maxwell3D* maxwell_3d);
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void ProcessMethodCall(u32 method, u32 argument);
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@ -46,10 +53,20 @@ public:
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void DrawIndex(PrimitiveTopology topology, u32 index_first, u32 index_count, u32 base_index,
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u32 base_instance, u32 num_instances);
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void DrawIndexedIndirect(PrimitiveTopology topology, u32 index_first, u32 index_count);
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const State& GetDrawState() const {
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return draw_state;
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}
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IndirectParams& GetIndirectParams() {
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return indirect_state;
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}
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const IndirectParams& GetIndirectParams() const {
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return indirect_state;
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}
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private:
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void SetInlineIndexBuffer(u32 index);
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@ -63,7 +80,10 @@ private:
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void ProcessDraw(bool draw_indexed, u32 instance_count);
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void ProcessDrawIndirect(bool draw_indexed);
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Maxwell3D* maxwell3d{};
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State draw_state{};
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IndirectParams indirect_state{};
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};
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} // namespace Tegra::Engines
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@ -17,6 +17,8 @@ public:
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/// Write multiple values to the register identified by method.
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virtual void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) = 0;
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GPUVAddr current_dma_segment;
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};
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} // namespace Tegra::Engines
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@ -53,42 +53,43 @@ void HLE_0217920100488FF7(Engines::Maxwell3D& maxwell3d, const std::vector<u32>&
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// Multidraw Indirect
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void HLE_3F5E74B9C9A50164(Engines::Maxwell3D& maxwell3d, const std::vector<u32>& parameters) {
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SCOPE_EXIT({
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// Clean everything.
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maxwell3d.regs.vertex_id_base = 0x0;
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maxwell3d.CallMethod(0x8e3, 0x640, true);
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maxwell3d.CallMethod(0x8e4, 0x0, true);
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maxwell3d.CallMethod(0x8e5, 0x0, true);
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maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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});
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const u32 start_indirect = parameters[0];
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const u32 end_indirect = parameters[1];
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if (start_indirect >= end_indirect) {
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// Nothing to do.
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return;
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}
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const u32 padding = parameters[3];
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const std::size_t max_draws = parameters[4];
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const auto topology =
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static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[2]);
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const u32 padding = parameters[3]; // padding is in words
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// size of each indirect segment
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const u32 indirect_words = 5 + padding;
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const std::size_t first_draw = start_indirect;
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const std::size_t effective_draws = end_indirect - start_indirect;
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const std::size_t last_draw = start_indirect + std::min(effective_draws, max_draws);
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for (std::size_t index = first_draw; index < last_draw; index++) {
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const u32 stride = indirect_words * sizeof(u32);
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const GPUVAddr start_address = maxwell3d.current_dma_segment + 4 * sizeof(u32);
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const std::size_t draw_count = end_indirect - start_indirect;
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u32 lowest_first = std::numeric_limits<u32>::max();
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u32 highest_limit = std::numeric_limits<u32>::min();
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for (std::size_t index = 0; index < draw_count; index++) {
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const std::size_t base = index * indirect_words + 5;
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const u32 base_vertex = parameters[base + 3];
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const u32 base_instance = parameters[base + 4];
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maxwell3d.regs.vertex_id_base = base_vertex;
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const u32 count = parameters[base];
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const u32 first_index = parameters[base + 2];
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lowest_first = std::min(lowest_first, first_index);
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highest_limit = std::max(highest_limit, first_index + count);
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}
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const u32 base_vertex = parameters[8];
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const u32 base_instance = parameters[9];
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maxwell3d.CallMethod(0x8e3, 0x640, true);
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maxwell3d.CallMethod(0x8e4, base_vertex, true);
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maxwell3d.CallMethod(0x8e5, base_instance, true);
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auto& params = maxwell3d.draw_manager->GetIndirectParams();
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params.start_address = start_address;
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params.buffer_size = sizeof(u32) + stride * draw_count;
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params.max_draw_counts = draw_count;
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params.stride = stride;
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maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
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maxwell3d.draw_manager->DrawIndex(
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static_cast<Tegra::Engines::Maxwell3D::Regs::PrimitiveTopology>(parameters[2]),
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parameters[base + 2], parameters[base], base_vertex, base_instance,
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parameters[base + 1]);
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}
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maxwell3d.draw_manager->DrawIndexedIndirect(topology, 0, highest_limit);
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}
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// Multi-layer Clear
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@ -42,6 +42,9 @@ public:
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/// Dispatches a draw invocation
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virtual void Draw(bool is_indexed, u32 instance_count) = 0;
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/// Dispatches an indirect draw invocation
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virtual void DrawIndirect(bool is_indexed) {}
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/// Clear the current framebuffer
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virtual void Clear(u32 layer_count) = 0;
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@ -180,7 +180,8 @@ RasterizerVulkan::RasterizerVulkan(Core::Frontend::EmuWindow& emu_window_, Tegra
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RasterizerVulkan::~RasterizerVulkan() = default;
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void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
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template <typename Func>
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void RasterizerVulkan::PrepareDraw(bool is_indexed, Func&& draw_func) {
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MICROPROFILE_SCOPE(Vulkan_Drawing);
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SCOPE_EXIT({ gpu.TickWork(); });
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@ -201,6 +202,13 @@ void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
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UpdateDynamicStates();
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draw_func();
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EndTransformFeedback();
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}
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void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
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PrepareDraw(is_indexed, [this, is_indexed, instance_count] {
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const auto& draw_state = maxwell3d->draw_manager->GetDrawState();
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const u32 num_instances{instance_count};
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const DrawParams draw_params{MakeDrawParams(draw_state, num_instances, is_indexed)};
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@ -214,7 +222,28 @@ void RasterizerVulkan::Draw(bool is_indexed, u32 instance_count) {
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draw_params.base_vertex, draw_params.base_instance);
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}
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});
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EndTransformFeedback();
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});
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}
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void RasterizerVulkan::DrawIndirect(bool is_indexed) {
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PrepareDraw(is_indexed, [this, is_indexed] {
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const auto params = maxwell3d->draw_manager->GetIndirectParams();
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const auto [buffer, offset] = buffer_cache.ObtainBuffer(
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params.start_address, static_cast<u32>(params.buffer_size), true, false);
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scheduler.Record([buffer_obj = buffer->Handle(), offset,
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max_draw_counts = params.max_draw_counts, stride = params.stride,
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is_indexed](vk::CommandBuffer cmdbuf) {
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if (is_indexed) {
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cmdbuf.DrawIndexedIndirectCount(buffer_obj, offset + 4ULL, buffer_obj, offset,
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static_cast<u32>(max_draw_counts),
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static_cast<u32>(stride));
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} else {
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cmdbuf.DrawIndirectCount(buffer_obj, offset + 4ULL, buffer_obj, offset,
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static_cast<u32>(max_draw_counts),
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static_cast<u32>(stride));
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}
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});
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});
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}
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void RasterizerVulkan::Clear(u32 layer_count) {
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@ -65,6 +65,7 @@ public:
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~RasterizerVulkan() override;
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void Draw(bool is_indexed, u32 instance_count) override;
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void DrawIndirect(bool is_indexed) override;
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void Clear(u32 layer_count) override;
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void DispatchCompute() override;
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void ResetCounter(VideoCore::QueryType type) override;
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@ -114,6 +115,9 @@ private:
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static constexpr VkDeviceSize DEFAULT_BUFFER_SIZE = 4 * sizeof(float);
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template <typename Func>
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void PrepareDraw(bool is_indexed, Func&&);
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void FlushWork();
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void UpdateDynamicStates();
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@ -350,7 +350,7 @@ Device::Device(VkInstance instance_, vk::PhysicalDevice physical_, VkSurfaceKHR
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.sampleRateShading = true,
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.dualSrcBlend = true,
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.logicOp = true,
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.multiDrawIndirect = false,
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.multiDrawIndirect = true,
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.drawIndirectFirstInstance = false,
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.depthClamp = true,
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.depthBiasClamp = true,
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@ -94,6 +94,8 @@ void Load(VkDevice device, DeviceDispatch& dld) noexcept {
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X(vkCmdDispatch);
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X(vkCmdDraw);
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X(vkCmdDrawIndexed);
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X(vkCmdDrawIndirectCount);
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X(vkCmdDrawIndexedIndirectCount);
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X(vkCmdEndQuery);
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X(vkCmdEndRenderPass);
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X(vkCmdEndTransformFeedbackEXT);
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@ -213,6 +213,8 @@ struct DeviceDispatch : InstanceDispatch {
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PFN_vkCmdDispatch vkCmdDispatch{};
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PFN_vkCmdDraw vkCmdDraw{};
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PFN_vkCmdDrawIndexed vkCmdDrawIndexed{};
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PFN_vkCmdDrawIndirectCount vkCmdDrawIndirectCount{};
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PFN_vkCmdDrawIndexedIndirectCount vkCmdDrawIndexedIndirectCount{};
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PFN_vkCmdEndDebugUtilsLabelEXT vkCmdEndDebugUtilsLabelEXT{};
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PFN_vkCmdEndQuery vkCmdEndQuery{};
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PFN_vkCmdEndRenderPass vkCmdEndRenderPass{};
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@ -1019,6 +1021,19 @@ public:
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first_instance);
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}
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void DrawIndirectCount(VkBuffer src_buffer, VkDeviceSize src_offset, VkBuffer count_buffer,
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VkDeviceSize count_offset, u32 draw_count, u32 stride) const noexcept {
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dld->vkCmdDrawIndirectCount(handle, src_buffer, src_offset, count_buffer, count_offset,
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draw_count, stride);
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}
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void DrawIndexedIndirectCount(VkBuffer src_buffer, VkDeviceSize src_offset,
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VkBuffer count_buffer, VkDeviceSize count_offset, u32 draw_count,
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u32 stride) const noexcept {
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dld->vkCmdDrawIndexedIndirectCount(handle, src_buffer, src_offset, count_buffer,
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count_offset, draw_count, stride);
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}
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void ClearAttachments(Span<VkClearAttachment> attachments,
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Span<VkClearRect> rects) const noexcept {
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dld->vkCmdClearAttachments(handle, attachments.size(), attachments.data(), rects.size(),
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