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Avoid using VectorExtractDynamic for subgroup mask on Adreno GPUs
This crashes their shader compiler for some reason.
This commit is contained in:
parent
158a1896ec
commit
b4a12b889e
3 changed files with 19 additions and 1 deletions
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@ -17,7 +17,22 @@ Id GetThreadId(EmitContext& ctx) {
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Id WarpExtract(EmitContext& ctx, Id value) {
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Id WarpExtract(EmitContext& ctx, Id value) {
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const Id thread_id{GetThreadId(ctx)};
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const Id thread_id{GetThreadId(ctx)};
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const Id local_index{ctx.OpShiftRightArithmetic(ctx.U32[1], thread_id, ctx.Const(5U))};
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const Id local_index{ctx.OpShiftRightArithmetic(ctx.U32[1], thread_id, ctx.Const(5U))};
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if (ctx.profile.has_broken_spirv_subgroup_mask_vector_extract_dynamic) {
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const Id c0_sel{ctx.OpSelect(ctx.U32[1], ctx.OpIEqual(ctx.U1, local_index, ctx.Const(0U)),
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ctx.OpCompositeExtract(ctx.U32[1], value, 0U), ctx.Const(0U))};
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const Id c1_sel{ctx.OpSelect(ctx.U32[1], ctx.OpIEqual(ctx.U1, local_index, ctx.Const(1U)),
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ctx.OpCompositeExtract(ctx.U32[1], value, 1U), ctx.Const(0U))};
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const Id c2_sel{ctx.OpSelect(ctx.U32[1], ctx.OpIEqual(ctx.U1, local_index, ctx.Const(2U)),
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ctx.OpCompositeExtract(ctx.U32[1], value, 2U), ctx.Const(0U))};
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const Id c3_sel{ctx.OpSelect(ctx.U32[1], ctx.OpIEqual(ctx.U1, local_index, ctx.Const(3U)),
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ctx.OpCompositeExtract(ctx.U32[1], value, 3U), ctx.Const(0U))};
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const Id c0_or_c1{ctx.OpBitwiseOr(ctx.U32[1], c0_sel, c1_sel)};
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const Id c2_or_c3{ctx.OpBitwiseOr(ctx.U32[1], c2_sel, c3_sel)};
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const Id c0_or_c1_or_c2_or_c3{ctx.OpBitwiseOr(ctx.U32[1], c0_or_c1, c2_or_c3)};
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return c0_or_c1_or_c2_or_c3;
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} else {
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return ctx.OpVectorExtractDynamic(ctx.U32[1], value, local_index);
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return ctx.OpVectorExtractDynamic(ctx.U32[1], value, local_index);
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}
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}
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}
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Id LoadMask(EmitContext& ctx, Id mask) {
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Id LoadMask(EmitContext& ctx, Id mask) {
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@ -78,6 +78,8 @@ struct Profile {
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bool has_gl_bool_ref_bug{};
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bool has_gl_bool_ref_bug{};
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/// Ignores SPIR-V ordered vs unordered using GLSL semantics
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/// Ignores SPIR-V ordered vs unordered using GLSL semantics
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bool ignore_nan_fp_comparisons{};
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bool ignore_nan_fp_comparisons{};
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/// Some drivers have broken support for OpVectorExtractDynamic on subgroup mask inputs
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bool has_broken_spirv_subgroup_mask_vector_extract_dynamic{};
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u32 gl_max_compute_smem_size{};
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u32 gl_max_compute_smem_size{};
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};
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};
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@ -351,6 +351,7 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, const Device& device
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.has_broken_signed_operations = false,
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.has_broken_signed_operations = false,
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.has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY,
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.has_broken_fp16_float_controls = driver_id == VK_DRIVER_ID_NVIDIA_PROPRIETARY,
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.ignore_nan_fp_comparisons = false,
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.ignore_nan_fp_comparisons = false,
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.has_broken_spirv_subgroup_mask_vector_extract_dynamic = driver_id == VK_DRIVER_ID_QUALCOMM_PROPRIETARY
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};
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};
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host_info = Shader::HostTranslateInfo{
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host_info = Shader::HostTranslateInfo{
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.support_float16 = device.IsFloat16Supported(),
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.support_float16 = device.IsFloat16Supported(),
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