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maxwell_3d: Partially implement texture buffers as 1D textures
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6c81c8f5b7
commit
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4 changed files with 24 additions and 10 deletions
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@ -430,14 +430,10 @@ Texture::TICEntry Maxwell3D::GetTICEntry(u32 tic_index) const {
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Texture::TICEntry tic_entry;
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memory_manager.ReadBlockUnsafe(tic_address_gpu, &tic_entry, sizeof(Texture::TICEntry));
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ASSERT_MSG(tic_entry.header_version == Texture::TICHeaderVersion::BlockLinear ||
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tic_entry.header_version == Texture::TICHeaderVersion::Pitch,
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"TIC versions other than BlockLinear or Pitch are unimplemented");
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const auto r_type = tic_entry.r_type.Value();
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const auto g_type = tic_entry.g_type.Value();
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const auto b_type = tic_entry.b_type.Value();
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const auto a_type = tic_entry.a_type.Value();
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const auto r_type{tic_entry.r_type.Value()};
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const auto g_type{tic_entry.g_type.Value()};
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const auto b_type{tic_entry.b_type.Value()};
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const auto a_type{tic_entry.a_type.Value()};
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// TODO(Subv): Different data types for separate components are not supported
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DEBUG_ASSERT(r_type == g_type && r_type == b_type && r_type == a_type);
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@ -140,7 +140,7 @@ std::size_t SurfaceParams::InnerMemorySize(bool force_gl, bool layer_only,
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params.width = Common::AlignUp(config.tic.Width(), GetCompressionFactor(params.pixel_format));
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params.height = Common::AlignUp(config.tic.Height(), GetCompressionFactor(params.pixel_format));
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if (!params.is_tiled) {
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if (config.tic.IsLineal()) {
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params.pitch = config.tic.Pitch();
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}
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params.unaligned_height = config.tic.Height();
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@ -12,6 +12,8 @@ SurfaceTarget SurfaceTargetFromTextureType(Tegra::Texture::TextureType texture_t
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switch (texture_type) {
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case Tegra::Texture::TextureType::Texture1D:
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return SurfaceTarget::Texture1D;
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case Tegra::Texture::TextureType::Texture1DBuffer:
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return SurfaceTarget::Texture1D; // Fixme
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case Tegra::Texture::TextureType::Texture2D:
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case Tegra::Texture::TextureType::Texture2DNoMipmap:
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return SurfaceTarget::Texture2D;
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@ -172,12 +172,16 @@ struct TICEntry {
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BitField<26, 1, u32> use_header_opt_control;
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BitField<27, 1, u32> depth_texture;
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BitField<28, 4, u32> max_mip_level;
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BitField<0, 16, u32> buffer_high_width_minus_one;
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};
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union {
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BitField<0, 16, u32> width_minus_1;
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BitField<22, 1, u32> srgb_conversion;
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BitField<23, 4, TextureType> texture_type;
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BitField<29, 3, u32> border_size;
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BitField<0, 16, u32> buffer_low_width_minus_one;
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};
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union {
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BitField<0, 16, u32> height_minus_1;
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@ -206,7 +210,10 @@ struct TICEntry {
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}
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u32 Width() const {
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return width_minus_1 + 1;
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if (header_version != TICHeaderVersion::OneDBuffer) {
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return width_minus_1 + 1;
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}
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return (buffer_high_width_minus_one << 16) | buffer_low_width_minus_one;
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}
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u32 Height() const {
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@ -237,6 +244,15 @@ struct TICEntry {
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header_version == TICHeaderVersion::BlockLinearColorKey;
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}
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bool IsLineal() const {
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return header_version == TICHeaderVersion::Pitch ||
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header_version == TICHeaderVersion::PitchColorKey;
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}
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bool IsBuffer() const {
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return header_version == TICHeaderVersion::OneDBuffer;
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}
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bool IsSrgbConversionEnabled() const {
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return srgb_conversion != 0;
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}
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