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armstate: Correct FIQ register banking
FIQ has seven banked registers (R8 to R14), not two.
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parent
b83e95727f
commit
d53c9cde1a
1 changed files with 3 additions and 4 deletions
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@ -2,6 +2,7 @@
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// Licensed under GPLv2 or any later version
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include <algorithm>
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#include "common/swap.h"
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#include "common/swap.h"
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#include "common/logging/log.h"
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#include "common/logging/log.h"
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#include "core/memory.h"
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#include "core/memory.h"
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@ -48,8 +49,7 @@ void ARMul_State::ChangePrivilegeMode(u32 new_mode)
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Spsr[UNDEFBANK] = Spsr_copy;
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Spsr[UNDEFBANK] = Spsr_copy;
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break;
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break;
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case FIQ32MODE:
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case FIQ32MODE:
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Reg_firq[0] = Reg[13];
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std::copy(Reg.begin() + 8, Reg.end() - 1, Reg_firq.begin());
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Reg_firq[1] = Reg[14];
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Spsr[FIQBANK] = Spsr_copy;
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Spsr[FIQBANK] = Spsr_copy;
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break;
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break;
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}
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}
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@ -85,8 +85,7 @@ void ARMul_State::ChangePrivilegeMode(u32 new_mode)
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Bank = UNDEFBANK;
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Bank = UNDEFBANK;
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break;
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break;
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case FIQ32MODE:
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case FIQ32MODE:
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Reg[13] = Reg_firq[0];
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std::copy(Reg_firq.begin(), Reg_firq.end(), Reg.begin() + 8);
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Reg[14] = Reg_firq[1];
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Spsr_copy = Spsr[FIQBANK];
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Spsr_copy = Spsr[FIQBANK];
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Bank = FIQBANK;
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Bank = FIQBANK;
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break;
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break;
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