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dyncom: Fix 32-bit ASR shifts for immediates

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This commit is contained in:
Lioncash 2015-01-12 14:12:05 -05:00
parent ac05c4acb0
commit f7770b83d4
1 changed files with 3 additions and 5 deletions
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6
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
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@ -176,13 +176,11 @@ unsigned int DPO(ArithmeticShiftRightByImmediate)(arm_processor *cpu, unsigned i
unsigned int shifter_operand; unsigned int shifter_operand;
int shift_imm = BITS(sht_oper, 7, 11); int shift_imm = BITS(sht_oper, 7, 11);
if (shift_imm == 0) { if (shift_imm == 0) {
if (BIT(rm, 31)) { if (BIT(rm, 31) == 0)
shifter_operand = 0; shifter_operand = 0;
cpu->shifter_carry_out = BIT(rm, 31); else
} else {
shifter_operand = 0xFFFFFFFF; shifter_operand = 0xFFFFFFFF;
cpu->shifter_carry_out = BIT(rm, 31); cpu->shifter_carry_out = BIT(rm, 31);
}
} else { } else {
shifter_operand = static_cast<int>(rm) >> shift_imm; shifter_operand = static_cast<int>(rm) >> shift_imm;
cpu->shifter_carry_out = BIT(rm, shift_imm - 1); cpu->shifter_carry_out = BIT(rm, shift_imm - 1);