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13608 commits 22 branches 3 tags 304 MiB
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280 commits

Author SHA1 Message Date
bunnei
08c508b1c4
Merge pull request #3357 from ReinUsesLisp/bfi-rc 
shader/bfi: Implement register-constant buffer variant
 2020-02-04 15:14:13 -05:00
bunnei
bf21aacc74
Merge pull request #3356 from ReinUsesLisp/fcmp 
shader/arithmetic: Implement FCMP
 2020-02-04 11:36:59 -05:00
bunnei
c31ec00d67
Merge pull request #3337 from ReinUsesLisp/vulkan-staged 
yuzu: Implement Vulkan frontend
 2020-02-03 16:56:25 -05:00
ReinUsesLisp
223a89a19f shader: Remove curly braces initializers on shared pointers 2020-02-01 22:52:10 -03:00
bunnei
b5bbe7e752
Merge pull request #3282 from FernandoS27/indexed-samplers 
Partially implement Indexed samplers in general and specific code in GLSL
 2020-02-01 20:41:40 -05:00
bunnei
c593e45dbd
Merge pull request #3347 from ReinUsesLisp/local-mem 
shader/memory: Implement LDL.S16, LDS.S16, STL.S16 and STS.S16
 2020-01-30 10:59:52 -05:00
ReinUsesLisp
9f0162e4b5 shader/other: Fix skips for SYNC and BRK 2020-01-29 17:53:11 -03:00
ReinUsesLisp
270177f38a shader/other: Stub S2R LaneId 2020-01-29 17:53:11 -03:00
ReinUsesLisp
137a8aa55c shader/bfi: Implement register-constant buffer variant 
It's the same as the variant that was implemented, but it takes the
operands from another source.
 2020-01-27 01:20:38 -03:00
ReinUsesLisp
e3fc3459c8 shader/arithmetic: Implement FCMP 
Compares the third operand with zero, then selects between the first and
second.
 2020-01-27 01:15:44 -03:00
ReinUsesLisp
d95d4ac843 shader/memory: Implement ATOM.ADD 
ATOM operates atomically on global memory. For now only add ATOM.ADD
since that's what was found in commercial games.

This asserts for ATOM.ADD.S32 (handling the others as unimplemented),
although ATOM.ADD.U32 shouldn't be any different.

This change forces us to change the default type on SPIR-V storage
buffers from float to uint. We could also alias the buffers, but it's
simpler for now to just use uint. While we are at it, abstract the code
to avoid repetition.
 2020-01-26 01:54:24 -03:00
Fernando Sahmkow
bb8eb15d39 Shader_IR: Address feedback. 2020-01-25 09:04:59 -04:00
ReinUsesLisp
d26e74f0a3 shader/memory: Implement STL.S16 and STS.S16 2020-01-25 03:16:10 -03:00
ReinUsesLisp
9a2cdf8520 shader/memory: Implement unaligned LDL.S16 and LDS.S16 2020-01-25 03:16:10 -03:00
ReinUsesLisp
531f25a037 shader/memory: Move unaligned load/store to functions 2020-01-25 03:16:10 -03:00
ReinUsesLisp
96638f57c9 shader/memory: Implement LDL.S16 and LDS.S16 2020-01-25 03:15:55 -03:00
Fernando Sahmkow
806f569143 Shader_IR: Change name of TrackSampler function so it does not confuse with the type. 2020-01-24 16:44:48 -04:00
Fernando Sahmkow
7c530e0666 Shader_IR: Propagate bindless index into the GL compiler. 2020-01-24 16:44:47 -04:00
Fernando Sahmkow
037ea431ce Shader_IR: deduce size of indexed samplers 2020-01-24 16:43:31 -04:00
Fernando Sahmkow
f4603d23c5 Shader_IR: Setup Indexed Samplers on the IR 2020-01-24 16:43:30 -04:00
bunnei
a104b985a8
Merge pull request #3273 from FernandoS27/txd-array 
Shader_IR: Implement TXD Array.
 2020-01-24 14:02:40 -05:00
ReinUsesLisp
63ba41a26d shader/memory: Implement ATOMS.ADD.U32 2020-01-16 17:30:55 -03:00
bunnei
55f95e7f26
Merge pull request #3287 from ReinUsesLisp/ldg-stg-16 
shader_ir/memory: Implement u16 and u8 for STG and LDG
 2020-01-14 09:57:08 -05:00
ReinUsesLisp
13021b534c shader_ir/texture: Simplify AOFFI code 2020-01-09 03:50:37 -03:00
ReinUsesLisp
e2a2a556b9 shader_ir/memory: Implement u16 and u8 for STG and LDG 
Using the same technique we used for u8 on LDG, implement u16.

In the case of STG, load memory and insert the value we want to set
into it with bitfieldInsert. Then set that value.
 2020-01-09 02:12:29 -03:00
Fernando Sahmkow
a1667a7b46 Shader_IR: Implement TXD Array. 
This commit extends the compilation of TXD to support array samplers on
TXD.
 2020-01-04 13:28:02 -04:00
bunnei
028b2718ed
Merge pull request #3239 from ReinUsesLisp/p2r 
shader/p2r: Implement P2R Pr
 2019-12-31 20:37:16 -05:00
bunnei
8a76f816a4
Merge pull request #3228 from ReinUsesLisp/ptp 
shader/texture: Implement AOFFI and PTP for TLD4 and TLD4S
 2019-12-26 21:43:44 -05:00
bunnei
16dcfacbfc
Merge pull request #3235 from ReinUsesLisp/ldg-u8 
shader/memory: Implement LDG.U8 and unaligned U8 loads
 2019-12-21 22:50:28 -05:00
ReinUsesLisp
38d3a48873
shader/p2r: Implement P2R Pr 
P2R dumps predicate or condition codes state to a register. This is
useful for unit testing.
 2019-12-20 18:02:41 -03:00
ReinUsesLisp
cf27b59493
shader/r2p: Refactor P2R to support P2R 2019-12-20 17:55:42 -03:00
bunnei
7be65c6a68
Merge pull request #3234 from ReinUsesLisp/i2f-u8-selector 
shader/conversion: Implement byte selector in I2F
 2019-12-19 22:36:26 -05:00
ReinUsesLisp
ae8d4b6c0c
shader/memory: Implement LDG.U8 and unaligned U8 loads 
LDG can load single bytes instead of full integers or packs of integers.
These have the advantage of loading bytes that are not aligned to 4
bytes.

To emulate these this commit gets the byte being referenced (by doing
"address & 3" and then using that to extract the byte from the loaded
integer:

result = bitfieldExtract(loaded_integer, (address % 4) * 8, 8)
 2019-12-18 01:21:46 -03:00
ReinUsesLisp
a7d6bd1ef1
shader/conversion: Implement byte selector in I2F 
I2F's byte selector is used to choose what bytes to convert to float.
e.g. if the input is 0xaabbccdd and the selector is ".B3" it will
convert 0xaa. The default (when it's not shown in nvdisasm) is ".B0", in
that example the default would convert 0xdd to float.
 2019-12-18 00:41:22 -03:00
ReinUsesLisp
15a753b9a5
shader/texture: Properly shrink unused entries in size mismatches 
When a image format mismatches we were inserting zeroes to the texture
itself. This was not handling cases were the mismatch uses less
coordinates than the guest shader code. Address that by resizing the
vector.
 2019-12-17 23:38:10 -03:00
ReinUsesLisp
e09c1fbc1f
shader/texture: Implement TLD4.PTP 2019-12-16 04:09:24 -03:00
ReinUsesLisp
844e4a297b
shader/texture: Enable arrayed TLD4 2019-12-16 02:37:21 -03:00
ReinUsesLisp
3d2c44848b
shader/texture: Implement AOFFI for TLD4S 2019-12-16 02:06:42 -03:00
ReinUsesLisp
3d9fff82c0
shader/texture: Remove unnecesary parenthesis 2019-12-16 01:52:33 -03:00
Fernando Sahmkow
c0ee0aa1a8 Shader_IR: Correct TLD4S Depth Compare. 2019-12-11 19:53:17 -04:00
Fernando Sahmkow
af89723fa3 Shader_Ir: Correct TLD4S encoding and implement f16 flag. 2019-12-11 19:53:17 -04:00
Fernando Sahmkow
271a3264f3 Shader_Ir: default failed tracks on bindless samplers to null values. 2019-12-11 19:53:16 -04:00
ReinUsesLisp
425a254fa2
shader: Implement MEMBAR.GL 
Implement using memoryBarrier in GLSL and OpMemoryBarrier on SPIR-V.
 2019-12-10 16:45:03 -03:00
ReinUsesLisp
0b5b93053d
shader_ir/other: Implement S2R InvocationId 2019-12-09 23:52:28 -03:00
ReinUsesLisp
9ad6327fbd
shader: Keep track of shaders using warp instructions 2019-12-09 23:40:41 -03:00
ReinUsesLisp
6233b1db08
shader_ir/memory: Implement patch stores 2019-12-09 23:25:21 -03:00
bunnei
e36814d6d5
Merge pull request #3109 from FernandoS27/new-instr 
Implement FLO & TXD Instructions on GPU Shaders
 2019-12-06 18:18:16 -05:00
ReinUsesLisp
dc9961f341
shader/texture: Handle TLDS texture type mismatches 
Some games like "Fire Emblem: Three Houses" bind 2D textures to offsets
used by instructions of 1D textures. To handle the discrepancy this
commit uses the the texture type from the binding and modifies the
emitted code IR to build a valid backend expression.

E.g.: Bound texture is 2D and instruction is 1D, the emitted IR samples
a 2D texture in the coordinate ivec2(X, 0).
 2019-11-22 21:28:47 -03:00
ReinUsesLisp
32c1bc6a67
shader/texture: Deduce texture buffers from locker 
Instead of specializing shaders to separate texture buffers from 1D
textures, use the locker to deduce them while they are being decoded.
 2019-11-22 21:28:47 -03:00
ReinUsesLisp
24f4198cee
shader/other: Reduce DEPBAR log severity 
While DEPBAR is stubbed it doesn't change anything from our end. Shading
languages handle what this instruction does implicitly. We are not
getting anything out fo this log except noise.
 2019-11-19 21:26:40 -03:00