0bb85f6a75
Mostly fixing unused *, implicit conversion, braced scalar init, fpermissive, and some others. Some Clang errors likely remain in video_core, and std::ranges is still a pertinent issue in shader_recompiler shader_recompiler: cmake: Force bracket depth to 1024 on Clang Increases the maximum fold expression depth thread_worker: Include condition_variable Don't use list initializers in control flow Co-authored-by: ReinUsesLisp <reinuseslisp@airmail.cc>
108 lines
3.8 KiB
C++
108 lines
3.8 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <optional>
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#include "common/common_types.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/maxwell/decode.h"
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#include "shader_recompiler/frontend/maxwell/indirect_branch_table_track.h"
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#include "shader_recompiler/frontend/maxwell/opcodes.h"
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#include "shader_recompiler/frontend/maxwell/translate/impl/load_constant.h"
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namespace Shader::Maxwell {
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namespace {
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union Encoding {
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u64 raw;
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BitField<0, 8, IR::Reg> dest_reg;
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BitField<8, 8, IR::Reg> src_reg;
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BitField<20, 19, u64> immediate;
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BitField<56, 1, u64> is_negative;
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BitField<20, 24, s64> brx_offset;
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};
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template <typename Callable>
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std::optional<u64> Track(Environment& env, Location block_begin, Location& pos, Callable&& func) {
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while (pos >= block_begin) {
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const u64 insn{env.ReadInstruction(pos.Offset())};
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--pos;
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if (func(insn, Decode(insn))) {
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return insn;
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}
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}
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return std::nullopt;
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}
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std::optional<u64> TrackLDC(Environment& env, Location block_begin, Location& pos,
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IR::Reg brx_reg) {
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return Track(env, block_begin, pos, [brx_reg](u64 insn, Opcode opcode) {
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const LDC::Encoding ldc{insn};
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return opcode == Opcode::LDC && ldc.dest_reg == brx_reg && ldc.size == LDC::Size::B32 &&
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ldc.mode == LDC::Mode::Default;
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});
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}
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std::optional<u64> TrackSHL(Environment& env, Location block_begin, Location& pos,
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IR::Reg ldc_reg) {
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return Track(env, block_begin, pos, [ldc_reg](u64 insn, Opcode opcode) {
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const Encoding shl{insn};
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return opcode == Opcode::SHL_imm && shl.dest_reg == ldc_reg;
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});
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}
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std::optional<u64> TrackIMNMX(Environment& env, Location block_begin, Location& pos,
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IR::Reg shl_reg) {
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return Track(env, block_begin, pos, [shl_reg](u64 insn, Opcode opcode) {
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const Encoding imnmx{insn};
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return opcode == Opcode::IMNMX_imm && imnmx.dest_reg == shl_reg;
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});
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}
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} // Anonymous namespace
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std::optional<IndirectBranchTableInfo> TrackIndirectBranchTable(Environment& env, Location brx_pos,
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Location block_begin) {
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const u64 brx_insn{env.ReadInstruction(brx_pos.Offset())};
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const Opcode brx_opcode{Decode(brx_insn)};
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if (brx_opcode != Opcode::BRX && brx_opcode != Opcode::JMX) {
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throw LogicError("Tracked instruction is not BRX or JMX");
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}
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const IR::Reg brx_reg{Encoding{brx_insn}.src_reg};
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const s32 brx_offset{static_cast<s32>(Encoding{brx_insn}.brx_offset)};
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Location pos{brx_pos};
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const std::optional<u64> ldc_insn{TrackLDC(env, block_begin, pos, brx_reg)};
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if (!ldc_insn) {
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return std::nullopt;
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}
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const LDC::Encoding ldc{*ldc_insn};
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const u32 cbuf_index{static_cast<u32>(ldc.index)};
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const u32 cbuf_offset{static_cast<u32>(static_cast<s32>(ldc.offset.Value()))};
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const IR::Reg ldc_reg{ldc.src_reg};
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const std::optional<u64> shl_insn{TrackSHL(env, block_begin, pos, ldc_reg)};
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if (!shl_insn) {
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return std::nullopt;
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}
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const Encoding shl{*shl_insn};
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const IR::Reg shl_reg{shl.src_reg};
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const std::optional<u64> imnmx_insn{TrackIMNMX(env, block_begin, pos, shl_reg)};
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if (!imnmx_insn) {
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return std::nullopt;
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}
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const Encoding imnmx{*imnmx_insn};
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if (imnmx.is_negative != 0) {
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return std::nullopt;
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}
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const u32 imnmx_immediate{static_cast<u32>(imnmx.immediate.Value())};
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return IndirectBranchTableInfo{
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.cbuf_index = cbuf_index,
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.cbuf_offset = cbuf_offset,
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.num_entries = imnmx_immediate + 1,
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.branch_offset = brx_offset,
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.branch_reg = brx_reg,
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};
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}
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} // namespace Shader::Maxwell
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