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129 lines
4.3 KiB
C++
129 lines
4.3 KiB
C++
// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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namespace Memory {
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/**
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* Page size used by the ARM architecture. This is the smallest granularity with which memory can
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* be mapped.
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*/
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const u32 PAGE_SIZE = 0x1000;
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/// Physical memory regions as seen from the ARM11
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enum : PAddr {
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/// IO register area
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IO_AREA_PADDR = 0x10100000,
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IO_AREA_SIZE = 0x01000000, ///< IO area size (16MB)
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IO_AREA_PADDR_END = IO_AREA_PADDR + IO_AREA_SIZE,
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/// MPCore internal memory region
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MPCORE_RAM_PADDR = 0x17E00000,
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MPCORE_RAM_SIZE = 0x00002000, ///< MPCore internal memory size (8KB)
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MPCORE_RAM_PADDR_END = MPCORE_RAM_PADDR + MPCORE_RAM_SIZE,
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/// Video memory
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VRAM_PADDR = 0x18000000,
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VRAM_SIZE = 0x00600000, ///< VRAM size (6MB)
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VRAM_PADDR_END = VRAM_PADDR + VRAM_SIZE,
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/// DSP memory
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DSP_RAM_PADDR = 0x1FF00000,
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DSP_RAM_SIZE = 0x00080000, ///< DSP memory size (512KB)
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DSP_RAM_PADDR_END = DSP_RAM_PADDR + DSP_RAM_SIZE,
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/// AXI WRAM
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AXI_WRAM_PADDR = 0x1FF80000,
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AXI_WRAM_SIZE = 0x00080000, ///< AXI WRAM size (512KB)
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AXI_WRAM_PADDR_END = AXI_WRAM_PADDR + AXI_WRAM_SIZE,
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/// Main FCRAM
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FCRAM_PADDR = 0x20000000,
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FCRAM_SIZE = 0x08000000, ///< FCRAM size (128MB)
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FCRAM_PADDR_END = FCRAM_PADDR + FCRAM_SIZE,
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};
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/// Virtual user-space memory regions
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enum : VAddr {
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/// Where the application text, data and bss reside.
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PROCESS_IMAGE_VADDR = 0x00100000,
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PROCESS_IMAGE_MAX_SIZE = 0x03F00000,
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PROCESS_IMAGE_VADDR_END = PROCESS_IMAGE_VADDR + PROCESS_IMAGE_MAX_SIZE,
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/// Area where IPC buffers are mapped onto.
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IPC_MAPPING_VADDR = 0x04000000,
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IPC_MAPPING_SIZE = 0x04000000,
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IPC_MAPPING_VADDR_END = IPC_MAPPING_VADDR + IPC_MAPPING_SIZE,
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/// Application heap (includes stack).
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HEAP_VADDR = 0x08000000,
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HEAP_SIZE = 0x08000000,
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HEAP_VADDR_END = HEAP_VADDR + HEAP_SIZE,
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/// Area where shared memory buffers are mapped onto.
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SHARED_MEMORY_VADDR = 0x10000000,
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SHARED_MEMORY_SIZE = 0x04000000,
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SHARED_MEMORY_VADDR_END = SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE,
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/// Maps 1:1 to an offset in FCRAM. Used for HW allocations that need to be linear in physical memory.
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LINEAR_HEAP_VADDR = 0x14000000,
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LINEAR_HEAP_SIZE = 0x08000000,
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LINEAR_HEAP_VADDR_END = LINEAR_HEAP_VADDR + LINEAR_HEAP_SIZE,
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/// Maps 1:1 to the IO register area.
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IO_AREA_VADDR = 0x1EC00000,
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IO_AREA_VADDR_END = IO_AREA_VADDR + IO_AREA_SIZE,
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/// Maps 1:1 to VRAM.
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VRAM_VADDR = 0x1F000000,
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VRAM_VADDR_END = VRAM_VADDR + VRAM_SIZE,
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/// Maps 1:1 to DSP memory.
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DSP_RAM_VADDR = 0x1FF00000,
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DSP_RAM_VADDR_END = DSP_RAM_VADDR + DSP_RAM_SIZE,
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/// Read-only page containing kernel and system configuration values.
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CONFIG_MEMORY_VADDR = 0x1FF80000,
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CONFIG_MEMORY_SIZE = 0x00001000,
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CONFIG_MEMORY_VADDR_END = CONFIG_MEMORY_VADDR + CONFIG_MEMORY_SIZE,
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/// Usually read-only page containing mostly values read from hardware.
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SHARED_PAGE_VADDR = 0x1FF81000,
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SHARED_PAGE_SIZE = 0x00001000,
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SHARED_PAGE_VADDR_END = SHARED_PAGE_VADDR + SHARED_PAGE_SIZE,
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// TODO(yuriks): The size of this area is dynamic, the kernel grows
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// it as more and more threads are created. For now we'll just use a
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// hardcoded value.
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/// Area where TLS (Thread-Local Storage) buffers are allocated.
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TLS_AREA_VADDR = 0x1FF82000,
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TLS_AREA_SIZE = 0x00030000, // Each TLS buffer is 0x200 bytes, allows for 300 threads
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TLS_AREA_VADDR_END = TLS_AREA_VADDR + TLS_AREA_SIZE,
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};
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u8 Read8(VAddr addr);
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u16 Read16(VAddr addr);
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u32 Read32(VAddr addr);
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u64 Read64(VAddr addr);
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void Write8(VAddr addr, u8 data);
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void Write16(VAddr addr, u16 data);
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void Write32(VAddr addr, u32 data);
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void Write64(VAddr addr, u64 data);
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void WriteBlock(VAddr addr, const u8* data, size_t size);
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u8* GetPointer(VAddr virtual_address);
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/**
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* Gets a pointer to the memory region beginning at the specified physical address.
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*
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* @note This is currently implemented using PhysicalToVirtualAddress().
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*/
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u8* GetPhysicalPointer(PAddr address);
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}
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