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62 lines
2.2 KiB
C++
62 lines
2.2 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/node_helper.h"
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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u32 ShaderIR::DecodeFfma(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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UNIMPLEMENTED_IF_MSG(instr.ffma.cc != 0, "FFMA cc not implemented");
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if (instr.ffma.tab5980_0 != 1) {
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LOG_DEBUG(HW_GPU, "FFMA tab5980_0({}) not implemented", instr.ffma.tab5980_0.Value());
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}
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if (instr.ffma.tab5980_1 != 0) {
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LOG_DEBUG(HW_GPU, "FFMA tab5980_1({}) not implemented", instr.ffma.tab5980_1.Value());
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}
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const Node op_a = GetRegister(instr.gpr8);
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auto [op_b, op_c] = [&]() -> std::tuple<Node, Node> {
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switch (opcode->get().GetId()) {
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case OpCode::Id::FFMA_CR: {
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return {GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset()),
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GetRegister(instr.gpr39)};
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}
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case OpCode::Id::FFMA_RR:
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return {GetRegister(instr.gpr20), GetRegister(instr.gpr39)};
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case OpCode::Id::FFMA_RC: {
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return {GetRegister(instr.gpr39),
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GetConstBuffer(instr.cbuf34.index, instr.cbuf34.GetOffset())};
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}
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case OpCode::Id::FFMA_IMM:
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return {GetImmediate19(instr), GetRegister(instr.gpr39)};
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default:
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UNIMPLEMENTED_MSG("Unhandled FFMA instruction: {}", opcode->get().GetName());
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return {Immediate(0), Immediate(0)};
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}
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}();
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op_b = GetOperandAbsNegFloat(op_b, false, instr.ffma.negate_b);
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op_c = GetOperandAbsNegFloat(op_c, false, instr.ffma.negate_c);
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Node value = Operation(OperationCode::FFma, PRECISE, op_a, op_b, op_c);
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value = GetSaturatedFloat(value, instr.alu.saturate_d);
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SetInternalFlagsFromFloat(bb, value, instr.generates_cc);
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SetRegister(bb, instr.gpr0, value);
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return pc;
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}
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} // namespace VideoCommon::Shader
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