mirror of
https://git.suyu.dev/suyu/suyu.git
synced 2024-11-18 12:52:47 +01:00
82c2601555
Reimplement the buffer cache using cached bindings and page level granularity for modification tracking. This also drops the usage of shared pointers and virtual functions from the cache. - Bindings are cached, allowing to skip work when the game changes few bits between draws. - OpenGL Assembly shaders no longer copy when a region has been modified from the GPU to emulate constant buffers, instead GL_EXT_memory_object is used to alias sub-buffers within the same allocation. - OpenGL Assembly shaders stream constant buffer data using glProgramBufferParametersIuivNV, from NV_parameter_buffer_object. In theory this should save one hash table resolve inside the driver compared to glBufferSubData. - A new OpenGL stream buffer is implemented based on fences for drivers that are not Nvidia's proprietary, due to their low performance on partial glBufferSubData calls synchronized with 3D rendering (that some games use a lot). - Most optimizations are shared between APIs now, allowing Vulkan to cache more bindings than before, skipping unnecesarry work. This commit adds the necessary infrastructure to use Vulkan object from OpenGL. Overall, it improves performance and fixes some bugs present on the old cache. There are still some edge cases hit by some games that harm performance on some vendors, this are planned to be fixed in later commits.
175 lines
5.9 KiB
C++
175 lines
5.9 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/cityhash.h"
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#include "common/microprofile.h"
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#include "core/core.h"
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#include "core/memory.h"
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#include "video_core/dma_pusher.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/gpu.h"
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#include "video_core/memory_manager.h"
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namespace Tegra {
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DmaPusher::DmaPusher(Core::System& system_, GPU& gpu_) : gpu{gpu_}, system{system_} {}
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DmaPusher::~DmaPusher() = default;
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MICROPROFILE_DEFINE(DispatchCalls, "GPU", "Execute command buffer", MP_RGB(128, 128, 192));
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void DmaPusher::DispatchCalls() {
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MICROPROFILE_SCOPE(DispatchCalls);
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gpu.SyncGuestHost();
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dma_pushbuffer_subindex = 0;
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dma_state.is_last_call = true;
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while (system.IsPoweredOn()) {
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if (!Step()) {
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break;
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}
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}
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gpu.FlushCommands();
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gpu.SyncGuestHost();
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gpu.OnCommandListEnd();
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}
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bool DmaPusher::Step() {
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if (!ib_enable || dma_pushbuffer.empty()) {
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// pushbuffer empty and IB empty or nonexistent - nothing to do
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return false;
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}
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CommandList& command_list{dma_pushbuffer.front()};
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ASSERT_OR_EXECUTE(
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command_list.command_lists.size() || command_list.prefetch_command_list.size(), {
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// Somehow the command_list is empty, in order to avoid a crash
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// We ignore it and assume its size is 0.
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dma_pushbuffer.pop();
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dma_pushbuffer_subindex = 0;
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return true;
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});
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if (command_list.prefetch_command_list.size()) {
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// Prefetched command list from nvdrv, used for things like synchronization
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command_headers = std::move(command_list.prefetch_command_list);
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dma_pushbuffer.pop();
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} else {
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const CommandListHeader command_list_header{
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command_list.command_lists[dma_pushbuffer_subindex++]};
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const GPUVAddr dma_get = command_list_header.addr;
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if (dma_pushbuffer_subindex >= command_list.command_lists.size()) {
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// We've gone through the current list, remove it from the queue
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dma_pushbuffer.pop();
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dma_pushbuffer_subindex = 0;
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}
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if (command_list_header.size == 0) {
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return true;
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}
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// Push buffer non-empty, read a word
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command_headers.resize(command_list_header.size);
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gpu.MemoryManager().ReadBlockUnsafe(dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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}
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for (std::size_t index = 0; index < command_headers.size();) {
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const CommandHeader& command_header = command_headers[index];
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if (dma_state.method_count) {
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// Data word of methods command
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if (dma_state.non_incrementing) {
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const u32 max_write = static_cast<u32>(
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std::min<std::size_t>(index + dma_state.method_count, command_headers.size()) -
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index);
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CallMultiMethod(&command_header.argument, max_write);
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dma_state.method_count -= max_write;
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dma_state.is_last_call = true;
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index += max_write;
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continue;
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} else {
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dma_state.is_last_call = dma_state.method_count <= 1;
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CallMethod(command_header.argument);
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}
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if (!dma_state.non_incrementing) {
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dma_state.method++;
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}
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if (dma_increment_once) {
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dma_state.non_incrementing = true;
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}
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dma_state.method_count--;
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} else {
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// No command active - this is the first word of a new one
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switch (command_header.mode) {
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case SubmissionMode::Increasing:
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SetState(command_header);
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dma_state.non_incrementing = false;
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dma_increment_once = false;
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break;
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case SubmissionMode::NonIncreasing:
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SetState(command_header);
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dma_state.non_incrementing = true;
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dma_increment_once = false;
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break;
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case SubmissionMode::Inline:
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dma_state.method = command_header.method;
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dma_state.subchannel = command_header.subchannel;
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CallMethod(command_header.arg_count);
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dma_state.non_incrementing = true;
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dma_increment_once = false;
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break;
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case SubmissionMode::IncreaseOnce:
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SetState(command_header);
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dma_state.non_incrementing = false;
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dma_increment_once = true;
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break;
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default:
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break;
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}
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}
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index++;
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}
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return true;
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}
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void DmaPusher::SetState(const CommandHeader& command_header) {
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dma_state.method = command_header.method;
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dma_state.subchannel = command_header.subchannel;
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dma_state.method_count = command_header.method_count;
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}
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void DmaPusher::CallMethod(u32 argument) const {
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if (dma_state.method < non_puller_methods) {
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gpu.CallMethod(GPU::MethodCall{
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dma_state.method,
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argument,
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dma_state.subchannel,
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dma_state.method_count,
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});
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} else {
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subchannels[dma_state.subchannel]->CallMethod(dma_state.method, argument,
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dma_state.is_last_call);
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}
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}
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void DmaPusher::CallMultiMethod(const u32* base_start, u32 num_methods) const {
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if (dma_state.method < non_puller_methods) {
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gpu.CallMultiMethod(dma_state.method, dma_state.subchannel, base_start, num_methods,
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dma_state.method_count);
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} else {
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subchannels[dma_state.subchannel]->CallMultiMethod(dma_state.method, base_start,
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num_methods, dma_state.method_count);
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}
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}
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} // namespace Tegra
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