2018-12-20 23:09:21 +01:00
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// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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#include "video_core/shader/shader_ir.h"
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namespace VideoCommon::Shader {
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using Tegra::Shader::Instruction;
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using Tegra::Shader::OpCode;
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2018-12-21 03:53:50 +01:00
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using Tegra::Shader::SubOp;
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2018-12-20 23:09:21 +01:00
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u32 ShaderIR::DecodeArithmetic(BasicBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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2018-12-21 03:53:50 +01:00
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Node op_a = GetRegister(instr.gpr8);
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Node op_b = [&]() -> Node {
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if (instr.is_b_imm) {
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return GetImmediate19(instr);
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} else if (instr.is_b_gpr) {
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return GetRegister(instr.gpr20);
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} else {
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return GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset);
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}
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}();
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switch (opcode->get().GetId()) {
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case OpCode::Id::MOV_C:
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case OpCode::Id::MOV_R: {
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// MOV does not have neither 'abs' nor 'neg' bits.
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SetRegister(bb, instr.gpr0, op_b);
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break;
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}
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default:
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UNIMPLEMENTED_MSG("Unhandled arithmetic instruction: {}", opcode->get().GetName());
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}
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2018-12-20 23:09:21 +01:00
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return pc;
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}
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} // namespace VideoCommon::Shader
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