2021-05-08 21:28:52 +02:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <string_view>
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#include "shader_recompiler/backend/glasm/emit_context.h"
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#include "shader_recompiler/backend/glasm/emit_glasm_instructions.h"
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#include "shader_recompiler/frontend/ir/modifiers.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::Backend::GLASM {
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namespace {
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template <typename InputType>
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void Compare(EmitContext& ctx, IR::Inst& inst, InputType lhs, InputType rhs, std::string_view op,
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std::string_view type, bool ordered, bool inequality = false) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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ctx.Add("{}.{} RC.x,{},{};", op, type, lhs, rhs);
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if (ordered && inequality) {
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ctx.Add("SEQ.{} RC.y,{},{};"
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"SEQ.{} RC.z,{},{};"
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"AND.U RC.x,RC.x,RC.y;"
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"AND.U RC.x,RC.x,RC.z;"
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"SNE.S {}.x,RC.x,0;",
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type, lhs, lhs, type, rhs, rhs, ret);
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} else if (ordered) {
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ctx.Add("SNE.S {}.x,RC.x,0;", ret);
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} else {
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ctx.Add("SNE.{} RC.y,{},{};"
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"SNE.{} RC.z,{},{};"
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"OR.U RC.x,RC.x,RC.y;"
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"OR.U RC.x,RC.x,RC.z;"
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"SNE.S {}.x,RC.x,0;",
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type, lhs, lhs, type, rhs, rhs, ret);
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}
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}
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template <typename InputType>
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void Clamp(EmitContext& ctx, Register ret, InputType value, InputType min_value,
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InputType max_value, std::string_view type) {
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// Call MAX first to properly clamp nan to min_value instead
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ctx.Add("MAX.{} RC.x,{},{};"
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"MIN.{} {}.x,RC.x,{};",
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type, min_value, value, type, ret, max_value);
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}
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std::string_view Precise(IR::Inst& inst) {
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const bool precise{inst.Flags<IR::FpControl>().no_contraction};
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return precise ? ".PREC" : "";
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}
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} // Anonymous namespace
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void EmitFPAbs16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPAbs32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("MOV.F {}.x,|{}|;", inst, value);
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}
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void EmitFPAbs64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) {
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ctx.LongAdd("MOV.F64 {}.x,|{}|;", inst, value);
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}
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void EmitFPAdd16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] Register a, [[maybe_unused]] Register b) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPAdd32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b) {
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ctx.Add("ADD.F{} {}.x,{},{};", Precise(inst), ctx.reg_alloc.Define(inst), a, b);
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}
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void EmitFPAdd64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b) {
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ctx.Add("ADD.F64{} {}.x,{},{};", Precise(inst), ctx.reg_alloc.LongDefine(inst), a, b);
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}
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void EmitFPFma16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] Register a, [[maybe_unused]] Register b,
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[[maybe_unused]] Register c) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPFma32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b, ScalarF32 c) {
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ctx.Add("MAD.F{} {}.x,{},{},{};", Precise(inst), ctx.reg_alloc.Define(inst), a, b, c);
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}
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void EmitFPFma64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b, ScalarF64 c) {
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ctx.Add("MAD.F64{} {}.x,{},{},{};", Precise(inst), ctx.reg_alloc.LongDefine(inst), a, b, c);
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}
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void EmitFPMax32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b) {
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ctx.Add("MAX.F {}.x,{},{};", inst, a, b);
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}
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void EmitFPMax64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b) {
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ctx.LongAdd("MAX.F64 {}.x,{},{};", inst, a, b);
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}
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void EmitFPMin32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b) {
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ctx.Add("MIN.F {}.x,{},{};", inst, a, b);
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}
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void EmitFPMin64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b) {
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ctx.LongAdd("MIN.F64 {}.x,{},{};", inst, a, b);
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}
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void EmitFPMul16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] Register a, [[maybe_unused]] Register b) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPMul32(EmitContext& ctx, IR::Inst& inst, ScalarF32 a, ScalarF32 b) {
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ctx.Add("MUL.F{} {}.x,{},{};", Precise(inst), ctx.reg_alloc.Define(inst), a, b);
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}
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void EmitFPMul64(EmitContext& ctx, IR::Inst& inst, ScalarF64 a, ScalarF64 b) {
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ctx.Add("MUL.F64{} {}.x,{},{};", Precise(inst), ctx.reg_alloc.LongDefine(inst), a, b);
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}
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void EmitFPNeg16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPNeg32(EmitContext& ctx, IR::Inst& inst, ScalarRegister value) {
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ctx.Add("MOV.F {}.x,-{};", inst, value);
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}
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void EmitFPNeg64(EmitContext& ctx, IR::Inst& inst, Register value) {
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ctx.LongAdd("MOV.F64 {}.x,-{};", inst, value);
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}
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void EmitFPSin(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("SIN {}.x,{};", inst, value);
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}
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void EmitFPCos(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("COS {}.x,{};", inst, value);
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}
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void EmitFPExp2(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("EX2 {}.x,{};", inst, value);
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}
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void EmitFPLog2(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("LG2 {}.x,{};", inst, value);
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}
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void EmitFPRecip32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("RCP {}.x,{};", inst, value);
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}
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void EmitFPRecip64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPRecipSqrt32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("RSQ {}.x,{};", inst, value);
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}
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void EmitFPRecipSqrt64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPSqrt(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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ctx.Add("RSQ RC.x,{};RCP {}.x,RC.x;", value, ret);
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}
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void EmitFPSaturate16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPSaturate32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("MOV.F.SAT {}.x,{};", inst, value);
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}
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void EmitFPSaturate64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPClamp16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value,
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[[maybe_unused]] Register min_value, [[maybe_unused]] Register max_value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPClamp32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value, ScalarF32 min_value,
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ScalarF32 max_value) {
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Clamp(ctx, ctx.reg_alloc.Define(inst), value, min_value, max_value, "F");
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}
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void EmitFPClamp64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value, ScalarF64 min_value,
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ScalarF64 max_value) {
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Clamp(ctx, ctx.reg_alloc.LongDefine(inst), value, min_value, max_value, "F64");
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}
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void EmitFPRoundEven16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPRoundEven32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("ROUND.F {}.x,{};", inst, value);
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}
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void EmitFPRoundEven64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) {
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ctx.LongAdd("ROUND.F64 {}.x,{};", inst, value);
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}
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void EmitFPFloor16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPFloor32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("FLR.F {}.x,{};", inst, value);
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}
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void EmitFPFloor64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) {
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ctx.LongAdd("FLR.F64 {}.x,{};", inst, value);
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}
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void EmitFPCeil16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPCeil32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("CEIL.F {}.x,{};", inst, value);
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}
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void EmitFPCeil64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) {
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ctx.LongAdd("CEIL.F64 {}.x,{};", inst, value);
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}
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void EmitFPTrunc16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitFPTrunc32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
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ctx.Add("TRUNC.F {}.x,{};", inst, value);
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}
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|
|
2021-05-10 03:43:29 +02:00
|
|
|
void EmitFPTrunc64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) {
|
|
|
|
ctx.LongAdd("TRUNC.F64 {}.x,{};", inst, value);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdEqual16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
2021-05-10 02:13:09 +02:00
|
|
|
Compare(ctx, inst, lhs, rhs, "SEQ", "F", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SEQ", "F64", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPUnordEqual16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SEQ", "F", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SEQ", "F64", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdNotEqual16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdNotEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SNE", "F", true, true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdNotEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SNE", "F64", true, true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPUnordNotEqual16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordNotEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SNE", "F", false, true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordNotEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SNE", "F64", false, true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdLessThan16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdLessThan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
2021-05-10 02:13:09 +02:00
|
|
|
Compare(ctx, inst, lhs, rhs, "SLT", "F", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdLessThan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SLT", "F64", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPUnordLessThan16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordLessThan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SLT", "F", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordLessThan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SLT", "F64", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdGreaterThan16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdGreaterThan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SGT", "F", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdGreaterThan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SGT", "F64", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPUnordGreaterThan16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordGreaterThan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SGT", "F", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordGreaterThan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SGT", "F64", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdLessThanEqual16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdLessThanEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
2021-05-10 02:13:09 +02:00
|
|
|
Compare(ctx, inst, lhs, rhs, "SLE", "F", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdLessThanEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SLE", "F64", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPUnordLessThanEqual16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordLessThanEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SLE", "F", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordLessThanEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SLE", "F64", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPOrdGreaterThanEqual16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdGreaterThanEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SGE", "F", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPOrdGreaterThanEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SGE", "F64", true);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-09 08:11:34 +02:00
|
|
|
void EmitFPUnordGreaterThanEqual16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register lhs,
|
|
|
|
[[maybe_unused]] Register rhs) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordGreaterThanEqual32(EmitContext& ctx, IR::Inst& inst, ScalarF32 lhs, ScalarF32 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SGE", "F", false);
|
2021-05-08 21:28:52 +02:00
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPUnordGreaterThanEqual64(EmitContext& ctx, IR::Inst& inst, ScalarF64 lhs, ScalarF64 rhs) {
|
|
|
|
Compare(ctx, inst, lhs, rhs, "SGE", "F64", false);
|
|
|
|
}
|
|
|
|
|
|
|
|
void EmitFPIsNan16([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
|
2021-05-08 21:28:52 +02:00
|
|
|
throw NotImplementedException("GLASM instruction");
|
|
|
|
}
|
|
|
|
|
2021-05-10 02:13:09 +02:00
|
|
|
void EmitFPIsNan32(EmitContext& ctx, IR::Inst& inst, ScalarF32 value) {
|
|
|
|
Compare(ctx, inst, value, value, "SNE", "F", true, false);
|
|
|
|
}
|
|
|
|
|
|
|
|
void EmitFPIsNan64(EmitContext& ctx, IR::Inst& inst, ScalarF64 value) {
|
|
|
|
Compare(ctx, inst, value, value, "SNE", "F64", true, false);
|
|
|
|
}
|
|
|
|
|
2021-05-08 21:28:52 +02:00
|
|
|
} // namespace Shader::Backend::GLASM
|