2022-04-23 10:59:50 +02:00
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// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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2019-04-23 00:50:56 +02:00
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2019-05-14 19:38:01 +02:00
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#include <cstring>
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2022-08-14 11:36:36 +02:00
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#include "common/algorithm.h"
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2019-04-23 00:50:56 +02:00
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#include "common/assert.h"
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#include "video_core/engines/engine_upload.h"
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#include "video_core/memory_manager.h"
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2022-01-29 22:00:49 +01:00
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#include "video_core/rasterizer_interface.h"
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#include "video_core/textures/decoders.h"
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namespace Tegra::Engines::Upload {
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2020-12-04 20:39:12 +01:00
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State::State(MemoryManager& memory_manager_, Registers& regs_)
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: regs{regs_}, memory_manager{memory_manager_} {}
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2019-04-23 14:02:24 +02:00
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2019-05-14 19:41:34 +02:00
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State::~State() = default;
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2022-01-29 22:00:49 +01:00
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void State::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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rasterizer = rasterizer_;
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}
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2020-12-04 20:39:12 +01:00
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void State::ProcessExec(const bool is_linear_) {
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write_offset = 0;
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copy_size = regs.line_length_in * regs.line_count;
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inner_buffer.resize(copy_size);
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is_linear = is_linear_;
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}
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void State::ProcessData(const u32 data, const bool is_last_call) {
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const u32 sub_copy_size = std::min(4U, copy_size - write_offset);
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std::memcpy(&inner_buffer[write_offset], &data, sub_copy_size);
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write_offset += sub_copy_size;
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if (!is_last_call) {
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return;
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}
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ProcessData(inner_buffer);
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}
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void State::ProcessData(const u32* data, size_t num_data) {
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std::span<const u8> read_buffer(reinterpret_cast<const u8*>(data), num_data * sizeof(u32));
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ProcessData(read_buffer);
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}
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void State::ProcessData(std::span<const u8> read_buffer) {
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const GPUVAddr address{regs.dest.Address()};
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if (is_linear) {
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if (regs.line_count == 1) {
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rasterizer->AccelerateInlineToMemory(address, copy_size, read_buffer);
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} else {
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for (u32 line = 0; line < regs.line_count; ++line) {
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const GPUVAddr dest_line = address + static_cast<size_t>(line) * regs.dest.pitch;
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std::span<const u8> buffer(read_buffer.data() +
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static_cast<size_t>(line) * regs.line_length_in,
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regs.line_length_in);
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rasterizer->AccelerateInlineToMemory(dest_line, regs.line_length_in, buffer);
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}
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}
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} else {
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u32 width = regs.dest.width;
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u32 x_elements = regs.line_length_in;
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u32 x_offset = regs.dest.x;
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const u32 bpp_shift = Common::FoldRight(
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4U, [](u32 x, u32 y) { return std::min(x, static_cast<u32>(std::countr_zero(y))); },
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width, x_elements, x_offset, static_cast<u32>(address));
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width >>= bpp_shift;
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x_elements >>= bpp_shift;
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x_offset >>= bpp_shift;
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const u32 bytes_per_pixel = 1U << bpp_shift;
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const std::size_t dst_size = Tegra::Texture::CalculateSize(
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true, bytes_per_pixel, width, regs.dest.height, regs.dest.depth,
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regs.dest.BlockHeight(), regs.dest.BlockDepth());
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tmp_buffer.resize(dst_size);
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memory_manager.ReadBlock(address, tmp_buffer.data(), dst_size);
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Tegra::Texture::SwizzleSubrect(tmp_buffer, read_buffer, bytes_per_pixel, width,
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regs.dest.height, regs.dest.depth, x_offset, regs.dest.y,
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x_elements, regs.line_count, regs.dest.BlockHeight(),
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regs.dest.BlockDepth(), regs.line_length_in);
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memory_manager.WriteBlock(address, tmp_buffer.data(), dst_size);
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}
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}
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} // namespace Tegra::Engines::Upload
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