Merge pull request #2244 from bunnei/gpu-mem-refactor
video_core: Refactor to use MemoryManager interface for all memory access.
This commit is contained in:
bunnei
GitHub
commit
2392e146b0
20 changed files with 196 additions and 189 deletions
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@ -55,12 +55,9 @@ bool DmaPusher::Step() {
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}
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// Push buffer non-empty, read a word
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const auto address = gpu.MemoryManager().GpuToCpuAddress(dma_get);
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ASSERT_MSG(address, "Invalid GPU address");
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command_headers.resize(command_list_header.size);
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Memory::ReadBlock(*address, command_headers.data(), command_list_header.size * sizeof(u32));
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gpu.MemoryManager().ReadBlock(dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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for (const CommandHeader& command_header : command_headers) {
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@ -41,18 +41,13 @@ void KeplerMemory::ProcessData(u32 data) {
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ASSERT_MSG(regs.exec.linear, "Non-linear uploads are not supported");
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ASSERT(regs.dest.x == 0 && regs.dest.y == 0 && regs.dest.z == 0);
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const GPUVAddr address = regs.dest.Address();
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const auto dest_address =
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memory_manager.GpuToCpuAddress(address + state.write_offset * sizeof(u32));
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ASSERT_MSG(dest_address, "Invalid GPU address");
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// We have to invalidate the destination region to evict any outdated surfaces from the cache.
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// We do this before actually writing the new data because the destination address might contain
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// a dirty surface that will have to be written back to memory.
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system.Renderer().Rasterizer().InvalidateRegion(ToCacheAddr(Memory::GetPointer(*dest_address)),
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sizeof(u32));
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// We do this before actually writing the new data because the destination address might
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// contain a dirty surface that will have to be written back to memory.
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const GPUVAddr address{regs.dest.Address() + state.write_offset * sizeof(u32)};
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rasterizer.InvalidateRegion(ToCacheAddr(memory_manager.GetPointer(address)), sizeof(u32));
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memory_manager.Write32(address, data);
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Memory::Write32(*dest_address, data);
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system.GPU().Maxwell3D().dirty_flags.OnMemoryWrite();
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state.write_offset++;
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@ -270,11 +270,9 @@ void Maxwell3D::ProcessMacroBind(u32 data) {
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}
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void Maxwell3D::ProcessQueryGet() {
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GPUVAddr sequence_address = regs.query.QueryAddress();
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const GPUVAddr sequence_address{regs.query.QueryAddress()};
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// Since the sequence address is given as a GPU VAddr, we have to convert it to an application
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// VAddr before writing.
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const auto address = memory_manager.GpuToCpuAddress(sequence_address);
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ASSERT_MSG(address, "Invalid GPU address");
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// TODO(Subv): Support the other query units.
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ASSERT_MSG(regs.query.query_get.unit == Regs::QueryUnit::Crop,
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@ -309,7 +307,7 @@ void Maxwell3D::ProcessQueryGet() {
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// Write the current query sequence to the sequence address.
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// TODO(Subv): Find out what happens if you use a long query type but mark it as a short
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// query.
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Memory::Write32(*address, sequence);
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memory_manager.Write32(sequence_address, sequence);
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} else {
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// Write the 128-bit result structure in long mode. Note: We emulate an infinitely fast
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// GPU, this command may actually take a while to complete in real hardware due to GPU
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@ -318,7 +316,7 @@ void Maxwell3D::ProcessQueryGet() {
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query_result.value = result;
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// TODO(Subv): Generate a real GPU timestamp and write it here instead of CoreTiming
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query_result.timestamp = system.CoreTiming().GetTicks();
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Memory::WriteBlock(*address, &query_result, sizeof(query_result));
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memory_manager.WriteBlock(sequence_address, &query_result, sizeof(query_result));
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}
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dirty_flags.OnMemoryWrite();
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break;
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@ -393,12 +391,11 @@ void Maxwell3D::ProcessCBData(u32 value) {
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// Don't allow writing past the end of the buffer.
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ASSERT(regs.const_buffer.cb_pos + sizeof(u32) <= regs.const_buffer.cb_size);
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const auto address = memory_manager.GpuToCpuAddress(buffer_address + regs.const_buffer.cb_pos);
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ASSERT_MSG(address, "Invalid GPU address");
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const GPUVAddr address{buffer_address + regs.const_buffer.cb_pos};
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u8* ptr{Memory::GetPointer(*address)};
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u8* ptr{memory_manager.GetPointer(address)};
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rasterizer.InvalidateRegion(ToCacheAddr(ptr), sizeof(u32));
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std::memcpy(ptr, &value, sizeof(u32));
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memory_manager.Write32(address, value);
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dirty_flags.OnMemoryWrite();
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@ -407,14 +404,10 @@ void Maxwell3D::ProcessCBData(u32 value) {
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}
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Texture::TICEntry Maxwell3D::GetTICEntry(u32 tic_index) const {
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const GPUVAddr tic_base_address = regs.tic.TICAddress();
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const GPUVAddr tic_address_gpu = tic_base_address + tic_index * sizeof(Texture::TICEntry);
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const auto tic_address_cpu = memory_manager.GpuToCpuAddress(tic_address_gpu);
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ASSERT_MSG(tic_address_cpu, "Invalid GPU address");
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const GPUVAddr tic_address_gpu{regs.tic.TICAddress() + tic_index * sizeof(Texture::TICEntry)};
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Texture::TICEntry tic_entry;
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Memory::ReadBlock(*tic_address_cpu, &tic_entry, sizeof(Texture::TICEntry));
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memory_manager.ReadBlock(tic_address_gpu, &tic_entry, sizeof(Texture::TICEntry));
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ASSERT_MSG(tic_entry.header_version == Texture::TICHeaderVersion::BlockLinear ||
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tic_entry.header_version == Texture::TICHeaderVersion::Pitch,
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@ -432,14 +425,10 @@ Texture::TICEntry Maxwell3D::GetTICEntry(u32 tic_index) const {
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}
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Texture::TSCEntry Maxwell3D::GetTSCEntry(u32 tsc_index) const {
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const GPUVAddr tsc_base_address = regs.tsc.TSCAddress();
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const GPUVAddr tsc_address_gpu = tsc_base_address + tsc_index * sizeof(Texture::TSCEntry);
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const auto tsc_address_cpu = memory_manager.GpuToCpuAddress(tsc_address_gpu);
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ASSERT_MSG(tsc_address_cpu, "Invalid GPU address");
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const GPUVAddr tsc_address_gpu{regs.tsc.TSCAddress() + tsc_index * sizeof(Texture::TSCEntry)};
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Texture::TSCEntry tsc_entry;
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Memory::ReadBlock(*tsc_address_cpu, &tsc_entry, sizeof(Texture::TSCEntry));
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memory_manager.ReadBlock(tsc_address_gpu, &tsc_entry, sizeof(Texture::TSCEntry));
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return tsc_entry;
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}
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@ -458,10 +447,7 @@ std::vector<Texture::FullTextureInfo> Maxwell3D::GetStageTextures(Regs::ShaderSt
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for (GPUVAddr current_texture = tex_info_buffer.address + TextureInfoOffset;
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current_texture < tex_info_buffer_end; current_texture += sizeof(Texture::TextureHandle)) {
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const auto address = memory_manager.GpuToCpuAddress(current_texture);
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ASSERT_MSG(address, "Invalid GPU address");
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const Texture::TextureHandle tex_handle{Memory::Read32(*address)};
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const Texture::TextureHandle tex_handle{memory_manager.Read32(current_texture)};
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Texture::FullTextureInfo tex_info{};
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// TODO(Subv): Use the shader to determine which textures are actually accessed.
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@ -496,10 +482,7 @@ Texture::FullTextureInfo Maxwell3D::GetStageTexture(Regs::ShaderStage stage,
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ASSERT(tex_info_address < tex_info_buffer.address + tex_info_buffer.size);
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const auto tex_address_cpu = memory_manager.GpuToCpuAddress(tex_info_address);
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ASSERT_MSG(tex_address_cpu, "Invalid GPU address");
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const Texture::TextureHandle tex_handle{Memory::Read32(*tex_address_cpu)};
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const Texture::TextureHandle tex_handle{memory_manager.Read32(tex_info_address)};
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Texture::FullTextureInfo tex_info{};
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tex_info.index = static_cast<u32>(offset);
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@ -43,11 +43,6 @@ void MaxwellDMA::HandleCopy() {
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const GPUVAddr source = regs.src_address.Address();
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const GPUVAddr dest = regs.dst_address.Address();
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const auto source_cpu = memory_manager.GpuToCpuAddress(source);
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const auto dest_cpu = memory_manager.GpuToCpuAddress(dest);
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ASSERT_MSG(source_cpu, "Invalid source GPU address");
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ASSERT_MSG(dest_cpu, "Invalid destination GPU address");
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// TODO(Subv): Perform more research and implement all features of this engine.
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ASSERT(regs.exec.enable_swizzle == 0);
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ASSERT(regs.exec.query_mode == Regs::QueryMode::None);
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@ -70,7 +65,7 @@ void MaxwellDMA::HandleCopy() {
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// buffer of length `x_count`, otherwise we copy a 2D image of dimensions (x_count,
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// y_count).
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if (!regs.exec.enable_2d) {
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Memory::CopyBlock(*dest_cpu, *source_cpu, regs.x_count);
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memory_manager.CopyBlock(dest, source, regs.x_count);
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return;
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}
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@ -79,9 +74,9 @@ void MaxwellDMA::HandleCopy() {
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// rectangle. There is no need to manually flush/invalidate the regions because
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// CopyBlock does that for us.
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for (u32 line = 0; line < regs.y_count; ++line) {
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const VAddr source_line = *source_cpu + line * regs.src_pitch;
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const VAddr dest_line = *dest_cpu + line * regs.dst_pitch;
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Memory::CopyBlock(dest_line, source_line, regs.x_count);
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const GPUVAddr source_line = source + line * regs.src_pitch;
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const GPUVAddr dest_line = dest + line * regs.dst_pitch;
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memory_manager.CopyBlock(dest_line, source_line, regs.x_count);
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}
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return;
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}
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@ -90,17 +85,18 @@ void MaxwellDMA::HandleCopy() {
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const std::size_t copy_size = regs.x_count * regs.y_count;
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auto source_ptr{memory_manager.GetPointer(source)};
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auto dst_ptr{memory_manager.GetPointer(dest)};
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const auto FlushAndInvalidate = [&](u32 src_size, u64 dst_size) {
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// TODO(Subv): For now, manually flush the regions until we implement GPU-accelerated
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// copying.
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Core::System::GetInstance().Renderer().Rasterizer().FlushRegion(
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ToCacheAddr(Memory::GetPointer(*source_cpu)), src_size);
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rasterizer.FlushRegion(ToCacheAddr(source_ptr), src_size);
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// We have to invalidate the destination region to evict any outdated surfaces from the
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// cache. We do this before actually writing the new data because the destination address
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// might contain a dirty surface that will have to be written back to memory.
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Core::System::GetInstance().Renderer().Rasterizer().InvalidateRegion(
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ToCacheAddr(Memory::GetPointer(*dest_cpu)), dst_size);
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rasterizer.InvalidateRegion(ToCacheAddr(dst_ptr), dst_size);
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};
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if (regs.exec.is_dst_linear && !regs.exec.is_src_linear) {
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@ -113,8 +109,8 @@ void MaxwellDMA::HandleCopy() {
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copy_size * src_bytes_per_pixel);
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Texture::UnswizzleSubrect(regs.x_count, regs.y_count, regs.dst_pitch,
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regs.src_params.size_x, src_bytes_per_pixel, *source_cpu,
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*dest_cpu, regs.src_params.BlockHeight(), regs.src_params.pos_x,
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regs.src_params.size_x, src_bytes_per_pixel, source_ptr, dst_ptr,
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regs.src_params.BlockHeight(), regs.src_params.pos_x,
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regs.src_params.pos_y);
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} else {
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ASSERT(regs.dst_params.size_z == 1);
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@ -127,7 +123,7 @@ void MaxwellDMA::HandleCopy() {
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// If the input is linear and the output is tiled, swizzle the input and copy it over.
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Texture::SwizzleSubrect(regs.x_count, regs.y_count, regs.src_pitch, regs.dst_params.size_x,
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src_bpp, *dest_cpu, *source_cpu, regs.dst_params.BlockHeight());
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src_bpp, dst_ptr, source_ptr, regs.dst_params.BlockHeight());
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}
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}
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@ -274,7 +274,6 @@ void GPU::ProcessSemaphoreTriggerMethod() {
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const auto op =
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static_cast<GpuSemaphoreOperation>(regs.semaphore_trigger & semaphoreOperationMask);
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if (op == GpuSemaphoreOperation::WriteLong) {
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auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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struct Block {
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u32 sequence;
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u32 zeros = 0;
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@ -286,11 +285,9 @@ void GPU::ProcessSemaphoreTriggerMethod() {
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// TODO(Kmather73): Generate a real GPU timestamp and write it here instead of
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// CoreTiming
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block.timestamp = Core::System::GetInstance().CoreTiming().GetTicks();
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Memory::WriteBlock(*address, &block, sizeof(block));
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memory_manager->WriteBlock(regs.smaphore_address.SmaphoreAddress(), &block, sizeof(block));
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} else {
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const auto address =
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memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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const u32 word = Memory::Read32(*address);
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const u32 word{memory_manager->Read32(regs.smaphore_address.SmaphoreAddress())};
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if ((op == GpuSemaphoreOperation::AcquireEqual && word == regs.semaphore_sequence) ||
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(op == GpuSemaphoreOperation::AcquireGequal &&
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static_cast<s32>(word - regs.semaphore_sequence) > 0) ||
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@ -317,13 +314,11 @@ void GPU::ProcessSemaphoreTriggerMethod() {
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}
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void GPU::ProcessSemaphoreRelease() {
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const auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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Memory::Write32(*address, regs.semaphore_release);
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memory_manager->Write32(regs.smaphore_address.SmaphoreAddress(), regs.semaphore_release);
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}
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void GPU::ProcessSemaphoreAcquire() {
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const auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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const u32 word = Memory::Read32(*address);
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const u32 word = memory_manager->Read32(regs.smaphore_address.SmaphoreAddress());
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const auto value = regs.semaphore_acquire;
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if (word != value) {
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regs.acquire_active = true;
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@ -5,6 +5,7 @@
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "core/memory.h"
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#include "video_core/memory_manager.h"
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namespace Tegra {
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@ -162,15 +163,51 @@ std::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr gpu_addr) {
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return base_addr + (gpu_addr & PAGE_MASK);
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}
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std::vector<GPUVAddr> MemoryManager::CpuToGpuAddress(VAddr cpu_addr) const {
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std::vector<GPUVAddr> results;
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for (const auto& region : mapped_regions) {
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if (cpu_addr >= region.cpu_addr && cpu_addr < (region.cpu_addr + region.size)) {
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const u64 offset{cpu_addr - region.cpu_addr};
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results.push_back(region.gpu_addr + offset);
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}
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}
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return results;
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u8 MemoryManager::Read8(GPUVAddr addr) {
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return Memory::Read8(*GpuToCpuAddress(addr));
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}
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u16 MemoryManager::Read16(GPUVAddr addr) {
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return Memory::Read16(*GpuToCpuAddress(addr));
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}
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u32 MemoryManager::Read32(GPUVAddr addr) {
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return Memory::Read32(*GpuToCpuAddress(addr));
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}
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u64 MemoryManager::Read64(GPUVAddr addr) {
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return Memory::Read64(*GpuToCpuAddress(addr));
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}
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void MemoryManager::Write8(GPUVAddr addr, u8 data) {
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Memory::Write8(*GpuToCpuAddress(addr), data);
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}
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void MemoryManager::Write16(GPUVAddr addr, u16 data) {
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Memory::Write16(*GpuToCpuAddress(addr), data);
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}
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void MemoryManager::Write32(GPUVAddr addr, u32 data) {
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Memory::Write32(*GpuToCpuAddress(addr), data);
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}
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void MemoryManager::Write64(GPUVAddr addr, u64 data) {
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Memory::Write64(*GpuToCpuAddress(addr), data);
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}
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u8* MemoryManager::GetPointer(GPUVAddr addr) {
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return Memory::GetPointer(*GpuToCpuAddress(addr));
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}
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void MemoryManager::ReadBlock(GPUVAddr src_addr, void* dest_buffer, std::size_t size) {
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std::memcpy(dest_buffer, GetPointer(src_addr), size);
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}
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void MemoryManager::WriteBlock(GPUVAddr dest_addr, const void* src_buffer, std::size_t size) {
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std::memcpy(GetPointer(dest_addr), src_buffer, size);
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}
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void MemoryManager::CopyBlock(GPUVAddr dest_addr, GPUVAddr src_addr, std::size_t size) {
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std::memcpy(GetPointer(dest_addr), GetPointer(src_addr), size);
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}
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VAddr& MemoryManager::PageSlot(GPUVAddr gpu_addr) {
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@ -27,12 +27,27 @@ public:
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GPUVAddr UnmapBuffer(GPUVAddr gpu_addr, u64 size);
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GPUVAddr GetRegionEnd(GPUVAddr region_start) const;
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std::optional<VAddr> GpuToCpuAddress(GPUVAddr gpu_addr);
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std::vector<GPUVAddr> CpuToGpuAddress(VAddr cpu_addr) const;
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static constexpr u64 PAGE_BITS = 16;
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static constexpr u64 PAGE_SIZE = 1 << PAGE_BITS;
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static constexpr u64 PAGE_MASK = PAGE_SIZE - 1;
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u8 Read8(GPUVAddr addr);
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u16 Read16(GPUVAddr addr);
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u32 Read32(GPUVAddr addr);
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u64 Read64(GPUVAddr addr);
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void Write8(GPUVAddr addr, u8 data);
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void Write16(GPUVAddr addr, u16 data);
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void Write32(GPUVAddr addr, u32 data);
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void Write64(GPUVAddr addr, u64 data);
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u8* GetPointer(GPUVAddr vaddr);
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void ReadBlock(GPUVAddr src_addr, void* dest_buffer, std::size_t size);
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void WriteBlock(GPUVAddr dest_addr, const void* src_buffer, std::size_t size);
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void CopyBlock(VAddr dest_addr, VAddr src_addr, std::size_t size);
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private:
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enum class PageStatus : u64 {
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Unmapped = 0xFFFFFFFFFFFFFFFFULL,
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@ -6,7 +6,6 @@
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#include <cstring>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "core/memory.h"
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#include "video_core/morton.h"
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#include "video_core/surface.h"
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#include "video_core/textures/decoders.h"
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@ -16,12 +15,12 @@ namespace VideoCore {
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using Surface::GetBytesPerPixel;
|
||||
using Surface::PixelFormat;
|
||||
|
||||
using MortonCopyFn = void (*)(u32, u32, u32, u32, u32, u32, u8*, VAddr);
|
||||
using MortonCopyFn = void (*)(u32, u32, u32, u32, u32, u32, u8*, u8*);
|
||||
using ConversionArray = std::array<MortonCopyFn, Surface::MaxPixelFormat>;
|
||||
|
||||
template <bool morton_to_linear, PixelFormat format>
|
||||
static void MortonCopy(u32 stride, u32 block_height, u32 height, u32 block_depth, u32 depth,
|
||||
u32 tile_width_spacing, u8* buffer, VAddr addr) {
|
||||
u32 tile_width_spacing, u8* buffer, u8* addr) {
|
||||
constexpr u32 bytes_per_pixel = GetBytesPerPixel(format);
|
||||
|
||||
// With the BCn formats (DXT and DXN), each 4x4 tile is swizzled instead of just individual
|
||||
|
|
@ -34,9 +33,9 @@ static void MortonCopy(u32 stride, u32 block_height, u32 height, u32 block_depth
|
|||
stride, height, depth, block_height, block_depth,
|
||||
tile_width_spacing);
|
||||
} else {
|
||||
Tegra::Texture::CopySwizzledData(
|
||||
(stride + tile_size_x - 1) / tile_size_x, (height + tile_size_y - 1) / tile_size_y,
|
||||
depth, bytes_per_pixel, bytes_per_pixel, Memory::GetPointer(addr), buffer, false,
|
||||
Tegra::Texture::CopySwizzledData((stride + tile_size_x - 1) / tile_size_x,
|
||||
(height + tile_size_y - 1) / tile_size_y, depth,
|
||||
bytes_per_pixel, bytes_per_pixel, addr, buffer, false,
|
||||
block_height, block_depth, tile_width_spacing);
|
||||
}
|
||||
}
|
||||
|
|
@ -282,7 +281,7 @@ static u32 GetMortonOffset128(u32 x, u32 y, u32 bytes_per_pixel) {
|
|||
|
||||
void MortonSwizzle(MortonSwizzleMode mode, Surface::PixelFormat format, u32 stride,
|
||||
u32 block_height, u32 height, u32 block_depth, u32 depth, u32 tile_width_spacing,
|
||||
u8* buffer, VAddr addr) {
|
||||
u8* buffer, u8* addr) {
|
||||
GetSwizzleFunction(mode, format)(stride, block_height, height, block_depth, depth,
|
||||
tile_width_spacing, buffer, addr);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ enum class MortonSwizzleMode { MortonToLinear, LinearToMorton };
|
|||
|
||||
void MortonSwizzle(MortonSwizzleMode mode, VideoCore::Surface::PixelFormat format, u32 stride,
|
||||
u32 block_height, u32 height, u32 block_depth, u32 depth, u32 tile_width_spacing,
|
||||
u8* buffer, VAddr addr);
|
||||
u8* buffer, u8* addr);
|
||||
|
||||
void MortonCopyPixels128(MortonSwizzleMode mode, u32 width, u32 height, u32 bytes_per_pixel,
|
||||
u32 linear_bytes_per_pixel, u8* morton_data, u8* linear_data);
|
||||
|
|
|
|||
|
|
@ -24,14 +24,12 @@ OGLBufferCache::OGLBufferCache(RasterizerOpenGL& rasterizer, std::size_t size)
|
|||
GLintptr OGLBufferCache::UploadMemory(Tegra::GPUVAddr gpu_addr, std::size_t size,
|
||||
std::size_t alignment, bool cache) {
|
||||
auto& memory_manager = Core::System::GetInstance().GPU().MemoryManager();
|
||||
const auto cpu_addr{memory_manager.GpuToCpuAddress(gpu_addr)};
|
||||
ASSERT_MSG(cpu_addr, "Invalid GPU address");
|
||||
|
||||
// Cache management is a big overhead, so only cache entries with a given size.
|
||||
// TODO: Figure out which size is the best for given games.
|
||||
cache &= size >= 2048;
|
||||
|
||||
const auto& host_ptr{Memory::GetPointer(*cpu_addr)};
|
||||
const auto& host_ptr{memory_manager.GetPointer(gpu_addr)};
|
||||
if (cache) {
|
||||
auto entry = TryGet(host_ptr);
|
||||
if (entry) {
|
||||
|
|
@ -54,8 +52,8 @@ GLintptr OGLBufferCache::UploadMemory(Tegra::GPUVAddr gpu_addr, std::size_t size
|
|||
buffer_offset += size;
|
||||
|
||||
if (cache) {
|
||||
auto entry = std::make_shared<CachedBufferEntry>(*cpu_addr, size, uploaded_offset,
|
||||
alignment, host_ptr);
|
||||
auto entry = std::make_shared<CachedBufferEntry>(
|
||||
*memory_manager.GpuToCpuAddress(gpu_addr), size, uploaded_offset, alignment, host_ptr);
|
||||
Register(entry);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -7,7 +7,6 @@
|
|||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/memory.h"
|
||||
#include "video_core/renderer_opengl/gl_global_cache.h"
|
||||
#include "video_core/renderer_opengl/gl_rasterizer.h"
|
||||
#include "video_core/renderer_opengl/gl_shader_decompiler.h"
|
||||
|
|
@ -39,7 +38,7 @@ void CachedGlobalRegion::Reload(u32 size_) {
|
|||
glBufferData(GL_SHADER_STORAGE_BUFFER, size, GetHostPtr(), GL_DYNAMIC_DRAW);
|
||||
}
|
||||
|
||||
GlobalRegion GlobalRegionCacheOpenGL::TryGetReservedGlobalRegion(VAddr addr, u32 size) const {
|
||||
GlobalRegion GlobalRegionCacheOpenGL::TryGetReservedGlobalRegion(CacheAddr addr, u32 size) const {
|
||||
const auto search{reserve.find(addr)};
|
||||
if (search == reserve.end()) {
|
||||
return {};
|
||||
|
|
@ -47,11 +46,14 @@ GlobalRegion GlobalRegionCacheOpenGL::TryGetReservedGlobalRegion(VAddr addr, u32
|
|||
return search->second;
|
||||
}
|
||||
|
||||
GlobalRegion GlobalRegionCacheOpenGL::GetUncachedGlobalRegion(VAddr addr, u32 size, u8* host_ptr) {
|
||||
GlobalRegion region{TryGetReservedGlobalRegion(addr, size)};
|
||||
GlobalRegion GlobalRegionCacheOpenGL::GetUncachedGlobalRegion(Tegra::GPUVAddr addr, u32 size,
|
||||
u8* host_ptr) {
|
||||
GlobalRegion region{TryGetReservedGlobalRegion(ToCacheAddr(host_ptr), size)};
|
||||
if (!region) {
|
||||
// No reserved surface available, create a new one and reserve it
|
||||
region = std::make_shared<CachedGlobalRegion>(addr, size, host_ptr);
|
||||
auto& memory_manager{Core::System::GetInstance().GPU().MemoryManager()};
|
||||
const auto cpu_addr = *memory_manager.GpuToCpuAddress(addr);
|
||||
region = std::make_shared<CachedGlobalRegion>(cpu_addr, size, host_ptr);
|
||||
ReserveGlobalRegion(region);
|
||||
}
|
||||
region->Reload(size);
|
||||
|
|
@ -59,7 +61,7 @@ GlobalRegion GlobalRegionCacheOpenGL::GetUncachedGlobalRegion(VAddr addr, u32 si
|
|||
}
|
||||
|
||||
void GlobalRegionCacheOpenGL::ReserveGlobalRegion(GlobalRegion region) {
|
||||
reserve.insert_or_assign(region->GetCpuAddr(), std::move(region));
|
||||
reserve.insert_or_assign(region->GetCacheAddr(), std::move(region));
|
||||
}
|
||||
|
||||
GlobalRegionCacheOpenGL::GlobalRegionCacheOpenGL(RasterizerOpenGL& rasterizer)
|
||||
|
|
@ -70,23 +72,20 @@ GlobalRegion GlobalRegionCacheOpenGL::GetGlobalRegion(
|
|||
Tegra::Engines::Maxwell3D::Regs::ShaderStage stage) {
|
||||
|
||||
auto& gpu{Core::System::GetInstance().GPU()};
|
||||
const auto cbufs = gpu.Maxwell3D().state.shader_stages[static_cast<u64>(stage)];
|
||||
const auto cbuf_addr = gpu.MemoryManager().GpuToCpuAddress(
|
||||
cbufs.const_buffers[global_region.GetCbufIndex()].address + global_region.GetCbufOffset());
|
||||
ASSERT(cbuf_addr);
|
||||
|
||||
const auto actual_addr_gpu = Memory::Read64(*cbuf_addr);
|
||||
const auto size = Memory::Read32(*cbuf_addr + 8);
|
||||
const auto actual_addr = gpu.MemoryManager().GpuToCpuAddress(actual_addr_gpu);
|
||||
ASSERT(actual_addr);
|
||||
auto& memory_manager{gpu.MemoryManager()};
|
||||
const auto cbufs{gpu.Maxwell3D().state.shader_stages[static_cast<u64>(stage)]};
|
||||
const auto addr{cbufs.const_buffers[global_region.GetCbufIndex()].address +
|
||||
global_region.GetCbufOffset()};
|
||||
const auto actual_addr{memory_manager.Read64(addr)};
|
||||
const auto size{memory_manager.Read32(addr + 8)};
|
||||
|
||||
// Look up global region in the cache based on address
|
||||
const auto& host_ptr{Memory::GetPointer(*actual_addr)};
|
||||
const auto& host_ptr{memory_manager.GetPointer(actual_addr)};
|
||||
GlobalRegion region{TryGet(host_ptr)};
|
||||
|
||||
if (!region) {
|
||||
// No global region found - create a new one
|
||||
region = GetUncachedGlobalRegion(*actual_addr, size, host_ptr);
|
||||
region = GetUncachedGlobalRegion(actual_addr, size, host_ptr);
|
||||
Register(region);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -65,11 +65,11 @@ public:
|
|||
Tegra::Engines::Maxwell3D::Regs::ShaderStage stage);
|
||||
|
||||
private:
|
||||
GlobalRegion TryGetReservedGlobalRegion(VAddr addr, u32 size) const;
|
||||
GlobalRegion GetUncachedGlobalRegion(VAddr addr, u32 size, u8* host_ptr);
|
||||
GlobalRegion TryGetReservedGlobalRegion(CacheAddr addr, u32 size) const;
|
||||
GlobalRegion GetUncachedGlobalRegion(Tegra::GPUVAddr addr, u32 size, u8* host_ptr);
|
||||
void ReserveGlobalRegion(GlobalRegion region);
|
||||
|
||||
std::unordered_map<VAddr, GlobalRegion> reserve;
|
||||
std::unordered_map<CacheAddr, GlobalRegion> reserve;
|
||||
};
|
||||
|
||||
} // namespace OpenGL
|
||||
|
|
|
|||
|
|
@ -46,10 +46,7 @@ GLintptr PrimitiveAssembler::MakeQuadIndexed(Tegra::GPUVAddr gpu_addr, std::size
|
|||
auto [dst_pointer, index_offset] = buffer_cache.ReserveMemory(map_size);
|
||||
|
||||
auto& memory_manager = Core::System::GetInstance().GPU().MemoryManager();
|
||||
const auto cpu_addr{memory_manager.GpuToCpuAddress(gpu_addr)};
|
||||
ASSERT_MSG(cpu_addr, "Invalid GPU address");
|
||||
|
||||
const u8* source{Memory::GetPointer(*cpu_addr)};
|
||||
const u8* source{memory_manager.GetPointer(gpu_addr)};
|
||||
|
||||
for (u32 primitive = 0; primitive < count / 4; ++primitive) {
|
||||
for (std::size_t i = 0; i < TRIANGLES_PER_QUAD; ++i) {
|
||||
|
|
|
|||
|
|
@ -57,11 +57,9 @@ static void ApplyTextureDefaults(GLuint texture, u32 max_mip_level) {
|
|||
|
||||
void SurfaceParams::InitCacheParameters(Tegra::GPUVAddr gpu_addr_) {
|
||||
auto& memory_manager{Core::System::GetInstance().GPU().MemoryManager()};
|
||||
const auto cpu_addr{memory_manager.GpuToCpuAddress(gpu_addr_)};
|
||||
|
||||
addr = cpu_addr ? *cpu_addr : 0;
|
||||
gpu_addr = gpu_addr_;
|
||||
host_ptr = Memory::GetPointer(addr);
|
||||
host_ptr = memory_manager.GetPointer(gpu_addr_);
|
||||
size_in_bytes = SizeInBytesRaw();
|
||||
|
||||
if (IsPixelFormatASTC(pixel_format)) {
|
||||
|
|
@ -447,7 +445,7 @@ void SwizzleFunc(const MortonSwizzleMode& mode, const SurfaceParams& params,
|
|||
MortonSwizzle(mode, params.pixel_format, params.MipWidth(mip_level),
|
||||
params.MipBlockHeight(mip_level), params.MipHeight(mip_level),
|
||||
params.MipBlockDepth(mip_level), 1, params.tile_width_spacing,
|
||||
gl_buffer.data() + offset_gl, params.addr + offset);
|
||||
gl_buffer.data() + offset_gl, params.host_ptr + offset);
|
||||
offset += layer_size;
|
||||
offset_gl += gl_size;
|
||||
}
|
||||
|
|
@ -456,7 +454,7 @@ void SwizzleFunc(const MortonSwizzleMode& mode, const SurfaceParams& params,
|
|||
MortonSwizzle(mode, params.pixel_format, params.MipWidth(mip_level),
|
||||
params.MipBlockHeight(mip_level), params.MipHeight(mip_level),
|
||||
params.MipBlockDepth(mip_level), depth, params.tile_width_spacing,
|
||||
gl_buffer.data(), params.addr + offset);
|
||||
gl_buffer.data(), params.host_ptr + offset);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -514,9 +512,9 @@ void RasterizerCacheOpenGL::CopySurface(const Surface& src_surface, const Surfac
|
|||
"reinterpretation but the texture is tiled.");
|
||||
}
|
||||
const std::size_t remaining_size = dst_params.size_in_bytes - src_params.size_in_bytes;
|
||||
|
||||
auto& memory_manager{Core::System::GetInstance().GPU().MemoryManager()};
|
||||
glBufferSubData(GL_PIXEL_PACK_BUFFER, src_params.size_in_bytes, remaining_size,
|
||||
Memory::GetPointer(dst_params.addr + src_params.size_in_bytes));
|
||||
memory_manager.GetPointer(dst_params.gpu_addr + src_params.size_in_bytes));
|
||||
}
|
||||
|
||||
glBindBuffer(GL_PIXEL_PACK_BUFFER, 0);
|
||||
|
|
@ -604,7 +602,7 @@ CachedSurface::CachedSurface(const SurfaceParams& params)
|
|||
|
||||
ApplyTextureDefaults(texture.handle, params.max_mip_level);
|
||||
|
||||
OpenGL::LabelGLObject(GL_TEXTURE, texture.handle, params.addr, params.IdentityString());
|
||||
OpenGL::LabelGLObject(GL_TEXTURE, texture.handle, params.gpu_addr, params.IdentityString());
|
||||
|
||||
// Clamp size to mapped GPU memory region
|
||||
// TODO(bunnei): Super Mario Odyssey maps a 0x40000 byte region and then uses it for a 0x80000
|
||||
|
|
@ -617,6 +615,8 @@ CachedSurface::CachedSurface(const SurfaceParams& params)
|
|||
LOG_ERROR(HW_GPU, "Surface size {} exceeds region size {}", params.size_in_bytes, max_size);
|
||||
cached_size_in_bytes = max_size;
|
||||
}
|
||||
|
||||
cpu_addr = *memory_manager.GpuToCpuAddress(params.gpu_addr);
|
||||
}
|
||||
|
||||
MICROPROFILE_DEFINE(OpenGL_SurfaceLoad, "OpenGL", "Surface Load", MP_RGB(128, 192, 64));
|
||||
|
|
@ -925,7 +925,7 @@ void RasterizerCacheOpenGL::LoadSurface(const Surface& surface) {
|
|||
}
|
||||
|
||||
Surface RasterizerCacheOpenGL::GetSurface(const SurfaceParams& params, bool preserve_contents) {
|
||||
if (params.addr == 0 || params.height * params.width == 0) {
|
||||
if (params.gpu_addr == 0 || params.height * params.width == 0) {
|
||||
return {};
|
||||
}
|
||||
|
||||
|
|
@ -979,14 +979,16 @@ void RasterizerCacheOpenGL::FastLayeredCopySurface(const Surface& src_surface,
|
|||
const Surface& dst_surface) {
|
||||
const auto& init_params{src_surface->GetSurfaceParams()};
|
||||
const auto& dst_params{dst_surface->GetSurfaceParams()};
|
||||
VAddr address = init_params.addr;
|
||||
const std::size_t layer_size = dst_params.LayerMemorySize();
|
||||
auto& memory_manager{Core::System::GetInstance().GPU().MemoryManager()};
|
||||
Tegra::GPUVAddr address{init_params.gpu_addr};
|
||||
const std::size_t layer_size{dst_params.LayerMemorySize()};
|
||||
for (u32 layer = 0; layer < dst_params.depth; layer++) {
|
||||
for (u32 mipmap = 0; mipmap < dst_params.max_mip_level; mipmap++) {
|
||||
const VAddr sub_address = address + dst_params.GetMipmapLevelOffset(mipmap);
|
||||
const Surface& copy = TryGet(Memory::GetPointer(sub_address));
|
||||
if (!copy)
|
||||
const Tegra::GPUVAddr sub_address{address + dst_params.GetMipmapLevelOffset(mipmap)};
|
||||
const Surface& copy{TryGet(memory_manager.GetPointer(sub_address))};
|
||||
if (!copy) {
|
||||
continue;
|
||||
}
|
||||
const auto& src_params{copy->GetSurfaceParams()};
|
||||
const u32 width{std::min(src_params.width, dst_params.MipWidth(mipmap))};
|
||||
const u32 height{std::min(src_params.height, dst_params.MipHeight(mipmap))};
|
||||
|
|
@ -1242,9 +1244,10 @@ static std::optional<u32> TryFindBestMipMap(std::size_t memory, const SurfacePar
|
|||
return {};
|
||||
}
|
||||
|
||||
static std::optional<u32> TryFindBestLayer(VAddr addr, const SurfaceParams params, u32 mipmap) {
|
||||
const std::size_t size = params.LayerMemorySize();
|
||||
VAddr start = params.addr + params.GetMipmapLevelOffset(mipmap);
|
||||
static std::optional<u32> TryFindBestLayer(Tegra::GPUVAddr addr, const SurfaceParams params,
|
||||
u32 mipmap) {
|
||||
const std::size_t size{params.LayerMemorySize()};
|
||||
Tegra::GPUVAddr start{params.gpu_addr + params.GetMipmapLevelOffset(mipmap)};
|
||||
for (u32 i = 0; i < params.depth; i++) {
|
||||
if (start == addr) {
|
||||
return {i};
|
||||
|
|
@ -1266,7 +1269,7 @@ static bool LayerFitReinterpretSurface(RasterizerCacheOpenGL& cache, const Surfa
|
|||
src_params.height == dst_params.MipHeight(*level) &&
|
||||
src_params.block_height >= dst_params.MipBlockHeight(*level)) {
|
||||
const std::optional<u32> slot =
|
||||
TryFindBestLayer(render_surface->GetCpuAddr(), dst_params, *level);
|
||||
TryFindBestLayer(render_surface->GetSurfaceParams().gpu_addr, dst_params, *level);
|
||||
if (slot.has_value()) {
|
||||
glCopyImageSubData(render_surface->Texture().handle,
|
||||
SurfaceTargetToGL(src_params.target), 0, 0, 0, 0,
|
||||
|
|
|
|||
|
|
@ -296,7 +296,6 @@ struct SurfaceParams {
|
|||
bool is_array;
|
||||
bool srgb_conversion;
|
||||
// Parameters used for caching
|
||||
VAddr addr;
|
||||
u8* host_ptr;
|
||||
Tegra::GPUVAddr gpu_addr;
|
||||
std::size_t size_in_bytes;
|
||||
|
|
@ -349,7 +348,7 @@ public:
|
|||
explicit CachedSurface(const SurfaceParams& params);
|
||||
|
||||
VAddr GetCpuAddr() const override {
|
||||
return params.addr;
|
||||
return cpu_addr;
|
||||
}
|
||||
|
||||
std::size_t GetSizeInBytes() const override {
|
||||
|
|
@ -433,6 +432,7 @@ private:
|
|||
std::size_t memory_size;
|
||||
bool reinterpreted = false;
|
||||
bool must_reload = false;
|
||||
VAddr cpu_addr{};
|
||||
};
|
||||
|
||||
class RasterizerCacheOpenGL final : public RasterizerCache<Surface> {
|
||||
|
|
|
|||
|
|
@ -32,13 +32,10 @@ struct UnspecializedShader {
|
|||
namespace {
|
||||
|
||||
/// Gets the address for the specified shader stage program
|
||||
VAddr GetShaderAddress(Maxwell::ShaderProgram program) {
|
||||
const auto& gpu = Core::System::GetInstance().GPU().Maxwell3D();
|
||||
const auto& shader_config = gpu.regs.shader_config[static_cast<std::size_t>(program)];
|
||||
const auto address = gpu.memory_manager.GpuToCpuAddress(gpu.regs.code_address.CodeAddress() +
|
||||
shader_config.offset);
|
||||
ASSERT_MSG(address, "Invalid GPU address");
|
||||
return *address;
|
||||
Tegra::GPUVAddr GetShaderAddress(Maxwell::ShaderProgram program) {
|
||||
const auto& gpu{Core::System::GetInstance().GPU().Maxwell3D()};
|
||||
const auto& shader_config{gpu.regs.shader_config[static_cast<std::size_t>(program)]};
|
||||
return gpu.regs.code_address.CodeAddress() + shader_config.offset;
|
||||
}
|
||||
|
||||
/// Gets the shader program code from memory for the specified address
|
||||
|
|
@ -214,11 +211,11 @@ std::set<GLenum> GetSupportedFormats() {
|
|||
|
||||
} // namespace
|
||||
|
||||
CachedShader::CachedShader(VAddr guest_addr, u64 unique_identifier,
|
||||
CachedShader::CachedShader(VAddr cpu_addr, u64 unique_identifier,
|
||||
Maxwell::ShaderProgram program_type, ShaderDiskCacheOpenGL& disk_cache,
|
||||
const PrecompiledPrograms& precompiled_programs,
|
||||
ProgramCode&& program_code, ProgramCode&& program_code_b, u8* host_ptr)
|
||||
: host_ptr{host_ptr}, guest_addr{guest_addr}, unique_identifier{unique_identifier},
|
||||
: host_ptr{host_ptr}, cpu_addr{cpu_addr}, unique_identifier{unique_identifier},
|
||||
program_type{program_type}, disk_cache{disk_cache},
|
||||
precompiled_programs{precompiled_programs}, RasterizerCacheObject{host_ptr} {
|
||||
|
||||
|
|
@ -244,11 +241,11 @@ CachedShader::CachedShader(VAddr guest_addr, u64 unique_identifier,
|
|||
disk_cache.SaveRaw(raw);
|
||||
}
|
||||
|
||||
CachedShader::CachedShader(VAddr guest_addr, u64 unique_identifier,
|
||||
CachedShader::CachedShader(VAddr cpu_addr, u64 unique_identifier,
|
||||
Maxwell::ShaderProgram program_type, ShaderDiskCacheOpenGL& disk_cache,
|
||||
const PrecompiledPrograms& precompiled_programs,
|
||||
GLShader::ProgramResult result, u8* host_ptr)
|
||||
: guest_addr{guest_addr}, unique_identifier{unique_identifier}, program_type{program_type},
|
||||
: cpu_addr{cpu_addr}, unique_identifier{unique_identifier}, program_type{program_type},
|
||||
disk_cache{disk_cache}, precompiled_programs{precompiled_programs}, RasterizerCacheObject{
|
||||
host_ptr} {
|
||||
|
||||
|
|
@ -273,7 +270,7 @@ std::tuple<GLuint, BaseBindings> CachedShader::GetProgramHandle(GLenum primitive
|
|||
disk_cache.SaveUsage(GetUsage(primitive_mode, base_bindings));
|
||||
}
|
||||
|
||||
LabelGLObject(GL_PROGRAM, program->handle, guest_addr);
|
||||
LabelGLObject(GL_PROGRAM, program->handle, cpu_addr);
|
||||
}
|
||||
|
||||
handle = program->handle;
|
||||
|
|
@ -325,7 +322,7 @@ GLuint CachedShader::LazyGeometryProgram(CachedProgram& target_program, BaseBind
|
|||
disk_cache.SaveUsage(GetUsage(primitive_mode, base_bindings));
|
||||
}
|
||||
|
||||
LabelGLObject(GL_PROGRAM, target_program->handle, guest_addr, debug_name);
|
||||
LabelGLObject(GL_PROGRAM, target_program->handle, cpu_addr, debug_name);
|
||||
|
||||
return target_program->handle;
|
||||
};
|
||||
|
|
@ -488,31 +485,31 @@ Shader ShaderCacheOpenGL::GetStageProgram(Maxwell::ShaderProgram program) {
|
|||
return last_shaders[static_cast<u32>(program)];
|
||||
}
|
||||
|
||||
const VAddr program_addr{GetShaderAddress(program)};
|
||||
auto& memory_manager{Core::System::GetInstance().GPU().MemoryManager()};
|
||||
const Tegra::GPUVAddr program_addr{GetShaderAddress(program)};
|
||||
|
||||
// Look up shader in the cache based on address
|
||||
const auto& host_ptr{Memory::GetPointer(program_addr)};
|
||||
const auto& host_ptr{memory_manager.GetPointer(program_addr)};
|
||||
Shader shader{TryGet(host_ptr)};
|
||||
|
||||
if (!shader) {
|
||||
// No shader found - create a new one
|
||||
const auto& host_ptr{Memory::GetPointer(program_addr)};
|
||||
ProgramCode program_code{GetShaderCode(host_ptr)};
|
||||
ProgramCode program_code_b;
|
||||
if (program == Maxwell::ShaderProgram::VertexA) {
|
||||
program_code_b = GetShaderCode(
|
||||
Memory::GetPointer(GetShaderAddress(Maxwell::ShaderProgram::VertexB)));
|
||||
memory_manager.GetPointer(GetShaderAddress(Maxwell::ShaderProgram::VertexB)));
|
||||
}
|
||||
const u64 unique_identifier = GetUniqueIdentifier(program, program_code, program_code_b);
|
||||
|
||||
const VAddr cpu_addr{*memory_manager.GpuToCpuAddress(program_addr)};
|
||||
const auto found = precompiled_shaders.find(unique_identifier);
|
||||
if (found != precompiled_shaders.end()) {
|
||||
shader =
|
||||
std::make_shared<CachedShader>(program_addr, unique_identifier, program, disk_cache,
|
||||
std::make_shared<CachedShader>(cpu_addr, unique_identifier, program, disk_cache,
|
||||
precompiled_programs, found->second, host_ptr);
|
||||
} else {
|
||||
shader = std::make_shared<CachedShader>(
|
||||
program_addr, unique_identifier, program, disk_cache, precompiled_programs,
|
||||
cpu_addr, unique_identifier, program, disk_cache, precompiled_programs,
|
||||
std::move(program_code), std::move(program_code_b), host_ptr);
|
||||
}
|
||||
Register(shader);
|
||||
|
|
|
|||
|
|
@ -39,18 +39,18 @@ using PrecompiledShaders = std::unordered_map<u64, GLShader::ProgramResult>;
|
|||
|
||||
class CachedShader final : public RasterizerCacheObject {
|
||||
public:
|
||||
explicit CachedShader(VAddr guest_addr, u64 unique_identifier,
|
||||
explicit CachedShader(VAddr cpu_addr, u64 unique_identifier,
|
||||
Maxwell::ShaderProgram program_type, ShaderDiskCacheOpenGL& disk_cache,
|
||||
const PrecompiledPrograms& precompiled_programs,
|
||||
ProgramCode&& program_code, ProgramCode&& program_code_b, u8* host_ptr);
|
||||
|
||||
explicit CachedShader(VAddr guest_addr, u64 unique_identifier,
|
||||
explicit CachedShader(VAddr cpu_addr, u64 unique_identifier,
|
||||
Maxwell::ShaderProgram program_type, ShaderDiskCacheOpenGL& disk_cache,
|
||||
const PrecompiledPrograms& precompiled_programs,
|
||||
GLShader::ProgramResult result, u8* host_ptr);
|
||||
|
||||
VAddr GetCpuAddr() const override {
|
||||
return guest_addr;
|
||||
return cpu_addr;
|
||||
}
|
||||
|
||||
std::size_t GetSizeInBytes() const override {
|
||||
|
|
@ -92,7 +92,7 @@ private:
|
|||
ShaderDiskCacheUsage GetUsage(GLenum primitive_mode, BaseBindings base_bindings) const;
|
||||
|
||||
u8* host_ptr{};
|
||||
VAddr guest_addr{};
|
||||
VAddr cpu_addr{};
|
||||
u64 unique_identifier{};
|
||||
Maxwell::ShaderProgram program_type{};
|
||||
ShaderDiskCacheOpenGL& disk_cache;
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
#include <cstring>
|
||||
#include "common/alignment.h"
|
||||
#include "common/assert.h"
|
||||
#include "core/memory.h"
|
||||
#include "video_core/gpu.h"
|
||||
#include "video_core/textures/decoders.h"
|
||||
#include "video_core/textures/texture.h"
|
||||
|
|
@ -230,18 +229,18 @@ u32 BytesPerPixel(TextureFormat format) {
|
|||
}
|
||||
}
|
||||
|
||||
void UnswizzleTexture(u8* const unswizzled_data, VAddr address, u32 tile_size_x, u32 tile_size_y,
|
||||
void UnswizzleTexture(u8* const unswizzled_data, u8* address, u32 tile_size_x, u32 tile_size_y,
|
||||
u32 bytes_per_pixel, u32 width, u32 height, u32 depth, u32 block_height,
|
||||
u32 block_depth, u32 width_spacing) {
|
||||
CopySwizzledData((width + tile_size_x - 1) / tile_size_x,
|
||||
(height + tile_size_y - 1) / tile_size_y, depth, bytes_per_pixel,
|
||||
bytes_per_pixel, Memory::GetPointer(address), unswizzled_data, true,
|
||||
block_height, block_depth, width_spacing);
|
||||
bytes_per_pixel, address, unswizzled_data, true, block_height, block_depth,
|
||||
width_spacing);
|
||||
}
|
||||
|
||||
std::vector<u8> UnswizzleTexture(VAddr address, u32 tile_size_x, u32 tile_size_y,
|
||||
u32 bytes_per_pixel, u32 width, u32 height, u32 depth,
|
||||
u32 block_height, u32 block_depth, u32 width_spacing) {
|
||||
std::vector<u8> UnswizzleTexture(u8* address, u32 tile_size_x, u32 tile_size_y, u32 bytes_per_pixel,
|
||||
u32 width, u32 height, u32 depth, u32 block_height,
|
||||
u32 block_depth, u32 width_spacing) {
|
||||
std::vector<u8> unswizzled_data(width * height * depth * bytes_per_pixel);
|
||||
UnswizzleTexture(unswizzled_data.data(), address, tile_size_x, tile_size_y, bytes_per_pixel,
|
||||
width, height, depth, block_height, block_depth, width_spacing);
|
||||
|
|
@ -249,8 +248,7 @@ std::vector<u8> UnswizzleTexture(VAddr address, u32 tile_size_x, u32 tile_size_y
|
|||
}
|
||||
|
||||
void SwizzleSubrect(u32 subrect_width, u32 subrect_height, u32 source_pitch, u32 swizzled_width,
|
||||
u32 bytes_per_pixel, VAddr swizzled_data, VAddr unswizzled_data,
|
||||
u32 block_height) {
|
||||
u32 bytes_per_pixel, u8* swizzled_data, u8* unswizzled_data, u32 block_height) {
|
||||
const u32 image_width_in_gobs{(swizzled_width * bytes_per_pixel + (gob_size_x - 1)) /
|
||||
gob_size_x};
|
||||
for (u32 line = 0; line < subrect_height; ++line) {
|
||||
|
|
@ -262,17 +260,17 @@ void SwizzleSubrect(u32 subrect_width, u32 subrect_height, u32 source_pitch, u32
|
|||
const u32 gob_address =
|
||||
gob_address_y + (x * bytes_per_pixel / gob_size_x) * gob_size * block_height;
|
||||
const u32 swizzled_offset = gob_address + table[(x * bytes_per_pixel) % gob_size_x];
|
||||
const VAddr source_line = unswizzled_data + line * source_pitch + x * bytes_per_pixel;
|
||||
const VAddr dest_addr = swizzled_data + swizzled_offset;
|
||||
u8* source_line = unswizzled_data + line * source_pitch + x * bytes_per_pixel;
|
||||
u8* dest_addr = swizzled_data + swizzled_offset;
|
||||
|
||||
Memory::CopyBlock(dest_addr, source_line, bytes_per_pixel);
|
||||
std::memcpy(dest_addr, source_line, bytes_per_pixel);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void UnswizzleSubrect(u32 subrect_width, u32 subrect_height, u32 dest_pitch, u32 swizzled_width,
|
||||
u32 bytes_per_pixel, VAddr swizzled_data, VAddr unswizzled_data,
|
||||
u32 block_height, u32 offset_x, u32 offset_y) {
|
||||
u32 bytes_per_pixel, u8* swizzled_data, u8* unswizzled_data, u32 block_height,
|
||||
u32 offset_x, u32 offset_y) {
|
||||
for (u32 line = 0; line < subrect_height; ++line) {
|
||||
const u32 y2 = line + offset_y;
|
||||
const u32 gob_address_y = (y2 / (gob_size_y * block_height)) * gob_size * block_height +
|
||||
|
|
@ -282,10 +280,10 @@ void UnswizzleSubrect(u32 subrect_width, u32 subrect_height, u32 dest_pitch, u32
|
|||
const u32 x2 = (x + offset_x) * bytes_per_pixel;
|
||||
const u32 gob_address = gob_address_y + (x2 / gob_size_x) * gob_size * block_height;
|
||||
const u32 swizzled_offset = gob_address + table[x2 % gob_size_x];
|
||||
const VAddr dest_line = unswizzled_data + line * dest_pitch + x * bytes_per_pixel;
|
||||
const VAddr source_addr = swizzled_data + swizzled_offset;
|
||||
u8* dest_line = unswizzled_data + line * dest_pitch + x * bytes_per_pixel;
|
||||
u8* source_addr = swizzled_data + swizzled_offset;
|
||||
|
||||
Memory::CopyBlock(dest_line, source_addr, bytes_per_pixel);
|
||||
std::memcpy(dest_line, source_addr, bytes_per_pixel);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -17,14 +17,14 @@ inline std::size_t GetGOBSize() {
|
|||
}
|
||||
|
||||
/// Unswizzles a swizzled texture without changing its format.
|
||||
void UnswizzleTexture(u8* unswizzled_data, VAddr address, u32 tile_size_x, u32 tile_size_y,
|
||||
void UnswizzleTexture(u8* unswizzled_data, u8* address, u32 tile_size_x, u32 tile_size_y,
|
||||
u32 bytes_per_pixel, u32 width, u32 height, u32 depth,
|
||||
u32 block_height = TICEntry::DefaultBlockHeight,
|
||||
u32 block_depth = TICEntry::DefaultBlockHeight, u32 width_spacing = 0);
|
||||
|
||||
/// Unswizzles a swizzled texture without changing its format.
|
||||
std::vector<u8> UnswizzleTexture(VAddr address, u32 tile_size_x, u32 tile_size_y,
|
||||
u32 bytes_per_pixel, u32 width, u32 height, u32 depth,
|
||||
std::vector<u8> UnswizzleTexture(u8* address, u32 tile_size_x, u32 tile_size_y, u32 bytes_per_pixel,
|
||||
u32 width, u32 height, u32 depth,
|
||||
u32 block_height = TICEntry::DefaultBlockHeight,
|
||||
u32 block_depth = TICEntry::DefaultBlockHeight,
|
||||
u32 width_spacing = 0);
|
||||
|
|
@ -44,12 +44,11 @@ std::size_t CalculateSize(bool tiled, u32 bytes_per_pixel, u32 width, u32 height
|
|||
|
||||
/// Copies an untiled subrectangle into a tiled surface.
|
||||
void SwizzleSubrect(u32 subrect_width, u32 subrect_height, u32 source_pitch, u32 swizzled_width,
|
||||
u32 bytes_per_pixel, VAddr swizzled_data, VAddr unswizzled_data,
|
||||
u32 block_height);
|
||||
u32 bytes_per_pixel, u8* swizzled_data, u8* unswizzled_data, u32 block_height);
|
||||
|
||||
/// Copies a tiled subrectangle into a linear surface.
|
||||
void UnswizzleSubrect(u32 subrect_width, u32 subrect_height, u32 dest_pitch, u32 swizzled_width,
|
||||
u32 bytes_per_pixel, VAddr swizzled_data, VAddr unswizzled_data,
|
||||
u32 block_height, u32 offset_x, u32 offset_y);
|
||||
u32 bytes_per_pixel, u8* swizzled_data, u8* unswizzled_data, u32 block_height,
|
||||
u32 offset_x, u32 offset_y);
|
||||
|
||||
} // namespace Tegra::Texture
|
||||
|
|
|
|||
|
|
@ -383,13 +383,12 @@ void GraphicsSurfaceWidget::OnUpdate() {
|
|||
// TODO: Implement a good way to visualize alpha components!
|
||||
|
||||
QImage decoded_image(surface_width, surface_height, QImage::Format_ARGB32);
|
||||
std::optional<VAddr> address = gpu.MemoryManager().GpuToCpuAddress(surface_address);
|
||||
|
||||
// TODO(bunnei): Will not work with BCn formats that swizzle 4x4 tiles.
|
||||
// Needs to be fixed if we plan to use this feature more, otherwise we may remove it.
|
||||
auto unswizzled_data = Tegra::Texture::UnswizzleTexture(
|
||||
*address, 1, 1, Tegra::Texture::BytesPerPixel(surface_format), surface_width,
|
||||
surface_height, 1U);
|
||||
gpu.MemoryManager().GetPointer(surface_address), 1, 1,
|
||||
Tegra::Texture::BytesPerPixel(surface_format), surface_width, surface_height, 1U);
|
||||
|
||||
auto texture_data = Tegra::Texture::DecodeTexture(unswizzled_data, surface_format,
|
||||
surface_width, surface_height);
|
||||
|
|
|
|||
Loading…
Reference in a new issue