N-archive/yuzu
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

shader/half_set_predicate: Implement missing HSETP2 variants

Browse source
This commit is contained in:
ReinUsesLisp 2019-05-14 17:16:23 -03:00
parent 5d369112d9
commit 6c4985edc9
2 changed files with 49 additions and 19 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

26
src/video_core/engines/shader_bytecode.h
View file

@ -931,8 +931,6 @@ union Instruction {
} csetp; } csetp;
union { union {
BitField<35, 4, PredCondition> cond;
BitField<49, 1, u64> h_and;
BitField<6, 1, u64> ftz; BitField<6, 1, u64> ftz;
BitField<45, 2, PredOperation> op; BitField<45, 2, PredOperation> op;
BitField<3, 3, u64> pred3; BitField<3, 3, u64> pred3;
@ -940,9 +938,21 @@ union Instruction {
BitField<43, 1, u64> negate_a; BitField<43, 1, u64> negate_a;
BitField<44, 1, u64> abs_a; BitField<44, 1, u64> abs_a;
BitField<47, 2, HalfType> type_a; BitField<47, 2, HalfType> type_a;
BitField<31, 1, u64> negate_b; union {
BitField<30, 1, u64> abs_b; BitField<35, 4, PredCondition> cond;
BitField<28, 2, HalfType> type_b; BitField<49, 1, u64> h_and;
BitField<31, 1, u64> negate_b;
BitField<30, 1, u64> abs_b;
BitField<28, 2, HalfType> type_b;
} reg;
union {
BitField<56, 1, u64> negate_b;
BitField<54, 1, u64> abs_b;
} cbuf;
union {
BitField<49, 4, PredCondition> cond;
BitField<53, 1, u64> h_and;
} cbuf_and_imm;
BitField<42, 1, u64> neg_pred; BitField<42, 1, u64> neg_pred;
BitField<39, 3, u64> pred39; BitField<39, 3, u64> pred39;
} hsetp2; } hsetp2;
@ -1548,7 +1558,9 @@ public:
HFMA2_RC, HFMA2_RC,
HFMA2_RR, HFMA2_RR,
HFMA2_IMM_R, HFMA2_IMM_R,
HSETP2_C,
HSETP2_R, HSETP2_R,
HSETP2_IMM,
HSET2_R, HSET2_R,
POPC_C, POPC_C,
POPC_R, POPC_R,
@ -1831,7 +1843,9 @@ private:
INST("01100---1-------", Id::HFMA2_RC, Type::Hfma2, "HFMA2_RC"), INST("01100---1-------", Id::HFMA2_RC, Type::Hfma2, "HFMA2_RC"),
INST("0101110100000---", Id::HFMA2_RR, Type::Hfma2, "HFMA2_RR"), INST("0101110100000---", Id::HFMA2_RR, Type::Hfma2, "HFMA2_RR"),
INST("01110---0-------", Id::HFMA2_IMM_R, Type::Hfma2, "HFMA2_R_IMM"), INST("01110---0-------", Id::HFMA2_IMM_R, Type::Hfma2, "HFMA2_R_IMM"),
INST("0101110100100---", Id::HSETP2_R, Type::HalfSetPredicate, "HSETP_R"), INST("0111111-1-------", Id::HSETP2_C, Type::HalfSetPredicate, "HSETP2_C"),
INST("0101110100100---", Id::HSETP2_R, Type::HalfSetPredicate, "HSETP2_R"),
INST("0111111-0-------", Id::HSETP2_IMM, Type::HalfSetPredicate, "HSETP2_IMM"),
INST("0101110100011---", Id::HSET2_R, Type::HalfSet, "HSET2_R"), INST("0101110100011---", Id::HSET2_R, Type::HalfSet, "HSET2_R"),
INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"), INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"),
INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"), INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"),

42
src/video_core/shader/decode/half_set_predicate.cpp
View file

@ -23,17 +23,33 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a); Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a); op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
Node op_b = [&]() { Tegra::Shader::PredCondition cond{};
switch (opcode->get().GetId()) { bool h_and{};
case OpCode::Id::HSETP2_R: Node op_b{};
return GetOperandAbsNegHalf(GetRegister(instr.gpr20), instr.hsetp2.abs_a, switch (opcode->get().GetId()) {
instr.hsetp2.negate_b); case OpCode::Id::HSETP2_C:
default: cond = instr.hsetp2.cbuf_and_imm.cond;
UNREACHABLE(); h_and = instr.hsetp2.cbuf_and_imm.h_and;
return Immediate(0); op_b = GetOperandAbsNegHalf(GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset),
} instr.hsetp2.cbuf.abs_b, instr.hsetp2.cbuf.negate_b);
}(); break;
op_b = UnpackHalfFloat(op_b, instr.hsetp2.type_b); case OpCode::Id::HSETP2_IMM:
cond = instr.hsetp2.cbuf_and_imm.cond;
h_and = instr.hsetp2.cbuf_and_imm.h_and;
op_b = UnpackHalfImmediate(instr, true);
break;
case OpCode::Id::HSETP2_R:
cond = instr.hsetp2.reg.cond;
h_and = instr.hsetp2.reg.h_and;
op_b =
UnpackHalfFloat(GetOperandAbsNegHalf(GetRegister(instr.gpr20), instr.hsetp2.reg.abs_b,
instr.hsetp2.reg.negate_b),
instr.hsetp2.reg.type_b);
break;
default:
UNREACHABLE();
op_b = Immediate(0);
}
// We can't use the constant predicate as destination. // We can't use the constant predicate as destination.
ASSERT(instr.hsetp2.pred3 != static_cast<u64>(Pred::UnusedIndex)); ASSERT(instr.hsetp2.pred3 != static_cast<u64>(Pred::UnusedIndex));
@ -42,9 +58,9 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
const OperationCode combiner = GetPredicateCombiner(instr.hsetp2.op); const OperationCode combiner = GetPredicateCombiner(instr.hsetp2.op);
const OperationCode pair_combiner = const OperationCode pair_combiner =
instr.hsetp2.h_and ? OperationCode::LogicalAll2 : OperationCode::LogicalAny2; h_and ? OperationCode::LogicalAll2 : OperationCode::LogicalAny2;
const Node comparison = GetPredicateComparisonHalf(instr.hsetp2.cond, op_a, op_b); const Node comparison = GetPredicateComparisonHalf(cond, op_a, op_b);
const Node first_pred = Operation(pair_combiner, comparison); const Node first_pred = Operation(pair_combiner, comparison);
// Set the primary predicate to the result of Predicate OP SecondPredicate // Set the primary predicate to the result of Predicate OP SecondPredicate