282 lines
9.7 KiB
C++
282 lines
9.7 KiB
C++
// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <array>
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#include <type_traits>
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#include "common/bit_field.h"
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#include "common/common_types.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/surface.h"
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#include "video_core/transform_feedback.h"
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namespace Vulkan {
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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struct DynamicFeatures {
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bool has_extended_dynamic_state;
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bool has_extended_dynamic_state_2;
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bool has_extended_dynamic_state_2_extra;
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bool has_extended_dynamic_state_3;
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bool has_dynamic_vertex_input;
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};
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struct FixedPipelineState {
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static u32 PackComparisonOp(Maxwell::ComparisonOp op) noexcept;
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static Maxwell::ComparisonOp UnpackComparisonOp(u32 packed) noexcept;
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static u32 PackStencilOp(Maxwell::StencilOp::Op op) noexcept;
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static Maxwell::StencilOp::Op UnpackStencilOp(u32 packed) noexcept;
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static u32 PackCullFace(Maxwell::CullFace cull) noexcept;
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static Maxwell::CullFace UnpackCullFace(u32 packed) noexcept;
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static u32 PackFrontFace(Maxwell::FrontFace face) noexcept;
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static Maxwell::FrontFace UnpackFrontFace(u32 packed) noexcept;
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static u32 PackPolygonMode(Maxwell::PolygonMode mode) noexcept;
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static Maxwell::PolygonMode UnpackPolygonMode(u32 packed) noexcept;
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static u32 PackLogicOp(Maxwell::LogicOp::Op op) noexcept;
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static Maxwell::LogicOp::Op UnpackLogicOp(u32 packed) noexcept;
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static u32 PackBlendEquation(Maxwell::Blend::Equation equation) noexcept;
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static Maxwell::Blend::Equation UnpackBlendEquation(u32 packed) noexcept;
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static u32 PackBlendFactor(Maxwell::Blend::Factor factor) noexcept;
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static Maxwell::Blend::Factor UnpackBlendFactor(u32 packed) noexcept;
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struct BlendingAttachment {
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union {
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u32 raw;
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BitField<0, 1, u32> mask_r;
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BitField<1, 1, u32> mask_g;
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BitField<2, 1, u32> mask_b;
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BitField<3, 1, u32> mask_a;
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BitField<4, 3, u32> equation_rgb;
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BitField<7, 3, u32> equation_a;
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BitField<10, 5, u32> factor_source_rgb;
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BitField<15, 5, u32> factor_dest_rgb;
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BitField<20, 5, u32> factor_source_a;
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BitField<25, 5, u32> factor_dest_a;
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BitField<30, 1, u32> enable;
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};
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void Refresh(const Maxwell& regs, size_t index);
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std::array<bool, 4> Mask() const noexcept {
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return {mask_r != 0, mask_g != 0, mask_b != 0, mask_a != 0};
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}
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Maxwell::Blend::Equation EquationRGB() const noexcept {
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return UnpackBlendEquation(equation_rgb.Value());
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}
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Maxwell::Blend::Equation EquationAlpha() const noexcept {
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return UnpackBlendEquation(equation_a.Value());
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}
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Maxwell::Blend::Factor SourceRGBFactor() const noexcept {
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return UnpackBlendFactor(factor_source_rgb.Value());
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}
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Maxwell::Blend::Factor DestRGBFactor() const noexcept {
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return UnpackBlendFactor(factor_dest_rgb.Value());
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}
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Maxwell::Blend::Factor SourceAlphaFactor() const noexcept {
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return UnpackBlendFactor(factor_source_a.Value());
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}
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Maxwell::Blend::Factor DestAlphaFactor() const noexcept {
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return UnpackBlendFactor(factor_dest_a.Value());
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}
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};
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union VertexAttribute {
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u32 raw;
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BitField<0, 1, u32> enabled;
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BitField<1, 5, u32> buffer;
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BitField<6, 14, u32> offset;
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BitField<20, 3, u32> type;
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BitField<23, 6, u32> size;
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Maxwell::VertexAttribute::Type Type() const noexcept {
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return static_cast<Maxwell::VertexAttribute::Type>(type.Value());
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}
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Maxwell::VertexAttribute::Size Size() const noexcept {
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return static_cast<Maxwell::VertexAttribute::Size>(size.Value());
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}
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};
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template <size_t Position>
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union StencilFace {
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BitField<Position + 0, 3, u32> action_stencil_fail;
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BitField<Position + 3, 3, u32> action_depth_fail;
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BitField<Position + 6, 3, u32> action_depth_pass;
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BitField<Position + 9, 3, u32> test_func;
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Maxwell::StencilOp::Op ActionStencilFail() const noexcept {
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return UnpackStencilOp(action_stencil_fail);
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}
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Maxwell::StencilOp::Op ActionDepthFail() const noexcept {
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return UnpackStencilOp(action_depth_fail);
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}
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Maxwell::StencilOp::Op ActionDepthPass() const noexcept {
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return UnpackStencilOp(action_depth_pass);
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}
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Maxwell::ComparisonOp TestFunc() const noexcept {
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return UnpackComparisonOp(test_func);
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}
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};
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struct DynamicState {
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union {
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u32 raw1;
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BitField<0, 2, u32> cull_face;
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BitField<2, 1, u32> cull_enable;
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BitField<3, 1, u32> primitive_restart_enable;
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BitField<4, 1, u32> depth_bias_enable;
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BitField<5, 1, u32> rasterize_enable;
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BitField<6, 4, u32> logic_op;
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};
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union {
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u32 raw2;
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StencilFace<0> front;
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StencilFace<12> back;
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BitField<24, 1, u32> stencil_enable;
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BitField<25, 1, u32> depth_write_enable;
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BitField<26, 1, u32> depth_bounds_enable;
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BitField<27, 1, u32> depth_test_enable;
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BitField<28, 1, u32> front_face;
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BitField<29, 3, u32> depth_test_func;
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};
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// Vertex stride is a 12 bits value, we have 4 bits to spare per element
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std::array<u16, Maxwell::NumVertexArrays> vertex_strides;
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void Refresh(const Maxwell& regs);
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void Refresh2(const Maxwell& regs, Maxwell::PrimitiveTopology topology, bool base_feautures_supported);
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void Refresh3(const Maxwell& regs);
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Maxwell::ComparisonOp DepthTestFunc() const noexcept {
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return UnpackComparisonOp(depth_test_func);
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}
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Maxwell::CullFace CullFace() const noexcept {
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return UnpackCullFace(cull_face.Value());
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}
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Maxwell::FrontFace FrontFace() const noexcept {
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return UnpackFrontFace(front_face.Value());
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}
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};
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union {
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u32 raw1;
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BitField<0, 1, u32> extended_dynamic_state;
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BitField<1, 1, u32> extended_dynamic_state_2;
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BitField<2, 1, u32> extended_dynamic_state_2_extra;
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BitField<3, 1, u32> extended_dynamic_state_3;
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BitField<4, 1, u32> dynamic_vertex_input;
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BitField<5, 1, u32> xfb_enabled;
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BitField<6, 1, u32> depth_clamp_disabled;
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BitField<7, 1, u32> ndc_minus_one_to_one;
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BitField<8, 2, u32> polygon_mode;
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BitField<10, 2, u32> tessellation_primitive;
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BitField<12, 2, u32> tessellation_spacing;
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BitField<14, 1, u32> tessellation_clockwise;
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BitField<15, 1, u32> logic_op_enable;
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BitField<16, 5, u32> patch_control_points_minus_one;
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BitField<24, 4, Maxwell::PrimitiveTopology> topology;
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BitField<28, 4, Tegra::Texture::MsaaMode> msaa_mode;
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};
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union {
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u32 raw2;
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BitField<1, 3, u32> alpha_test_func;
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BitField<4, 1, u32> early_z;
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BitField<5, 1, u32> depth_enabled;
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BitField<6, 5, u32> depth_format;
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BitField<11, 1, u32> y_negate;
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BitField<12, 1, u32> provoking_vertex_last;
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BitField<13, 1, u32> conservative_raster_enable;
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BitField<14, 1, u32> smooth_lines;
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BitField<15, 1, u32> alpha_to_coverage_enabled;
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BitField<16, 1, u32> alpha_to_one_enabled;
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BitField<17, 3, Tegra::Engines::Maxwell3D::EngineHint> app_stage;
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};
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std::array<u8, Maxwell::NumRenderTargets> color_formats;
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u32 alpha_test_ref;
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u32 point_size;
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std::array<BlendingAttachment, Maxwell::NumRenderTargets> attachments;
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std::array<u16, Maxwell::NumViewports> viewport_swizzles;
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union {
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u64 attribute_types; // Used with VK_EXT_vertex_input_dynamic_state
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u64 enabled_divisors;
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};
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std::array<VertexAttribute, Maxwell::NumVertexAttributes> attributes;
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std::array<u32, Maxwell::NumVertexArrays> binding_divisors;
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DynamicState dynamic_state;
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VideoCommon::TransformFeedbackState xfb_state;
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void Refresh(Tegra::Engines::Maxwell3D& maxwell3d, DynamicFeatures& features);
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size_t Hash() const noexcept;
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bool operator==(const FixedPipelineState& rhs) const noexcept;
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bool operator!=(const FixedPipelineState& rhs) const noexcept {
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return !operator==(rhs);
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}
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size_t Size() const noexcept {
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if (xfb_enabled) {
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// When transform feedback is enabled, use the whole struct
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return sizeof(*this);
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}
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if (dynamic_vertex_input && extended_dynamic_state_2) {
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// Exclude dynamic state and attributes
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return offsetof(FixedPipelineState, attributes);
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}
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if (extended_dynamic_state_2_extra) {
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// Exclude dynamic state
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return offsetof(FixedPipelineState, dynamic_state);
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}
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if (extended_dynamic_state) {
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// Exclude dynamic state
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return offsetof(FixedPipelineState, dynamic_state.raw2);
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}
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// Default
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return offsetof(FixedPipelineState, xfb_state);
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}
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u32 DynamicAttributeType(size_t index) const noexcept {
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return (attribute_types >> (index * 2)) & 0b11;
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}
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};
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static_assert(std::has_unique_object_representations_v<FixedPipelineState>);
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static_assert(std::is_trivially_copyable_v<FixedPipelineState>);
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static_assert(std::is_trivially_constructible_v<FixedPipelineState>);
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} // namespace Vulkan
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namespace std {
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template <>
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struct hash<Vulkan::FixedPipelineState> {
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size_t operator()(const Vulkan::FixedPipelineState& k) const noexcept {
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return k.Hash();
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}
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};
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} // namespace std
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