34037701c7
* Initial implementation of NvMap/NvHostCtrl * More work on NvHostCtrl * Refactoring of nvservices, move GPU Vmm, make Vmm per-process, refactor most gpu devices, move Gpu to Core, fix CbBind * Implement GetGpuTime, support CancelSynchronization, fix issue on InsertWaitingMutex, proper double buffering support (again, not working properly for commercial games, only hb) * Try to fix perf regression reading/writing textures, moved syncpts and events to a UserCtx class, delete global state when the process exits, other minor tweaks * Remove now unused code, add comment about probably wrong result codes
148 lines
No EOL
4.2 KiB
C#
148 lines
No EOL
4.2 KiB
C#
using Ryujinx.Graphics.Gal;
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using System.Collections.Generic;
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namespace Ryujinx.Core.Gpu
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{
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public class NvGpuEngine2d : INvGpuEngine
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{
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private enum CopyOperation
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{
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SrcCopyAnd,
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RopAnd,
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Blend,
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SrcCopy,
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Rop,
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SrcCopyPremult,
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BlendPremult
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}
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public int[] Registers { get; private set; }
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private NvGpu Gpu;
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private Dictionary<int, NvGpuMethod> Methods;
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public NvGpuEngine2d(NvGpu Gpu)
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{
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this.Gpu = Gpu;
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Registers = new int[0xe00];
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Methods = new Dictionary<int, NvGpuMethod>();
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void AddMethod(int Meth, int Count, int Stride, NvGpuMethod Method)
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{
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while (Count-- > 0)
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{
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Methods.Add(Meth, Method);
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Meth += Stride;
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}
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}
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AddMethod(0xb5, 1, 1, TextureCopy);
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}
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public void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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if (Methods.TryGetValue(PBEntry.Method, out NvGpuMethod Method))
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{
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Method(Vmm, PBEntry);
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}
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else
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{
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WriteRegister(PBEntry);
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}
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}
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private void TextureCopy(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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CopyOperation Operation = (CopyOperation)ReadRegister(NvGpuEngine2dReg.CopyOperation);
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bool SrcLinear = ReadRegister(NvGpuEngine2dReg.SrcLinear) != 0;
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int SrcWidth = ReadRegister(NvGpuEngine2dReg.SrcWidth);
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int SrcHeight = ReadRegister(NvGpuEngine2dReg.SrcHeight);
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bool DstLinear = ReadRegister(NvGpuEngine2dReg.DstLinear) != 0;
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int DstWidth = ReadRegister(NvGpuEngine2dReg.DstWidth);
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int DstHeight = ReadRegister(NvGpuEngine2dReg.DstHeight);
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int DstPitch = ReadRegister(NvGpuEngine2dReg.DstPitch);
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int DstBlkDim = ReadRegister(NvGpuEngine2dReg.DstBlockDimensions);
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TextureSwizzle DstSwizzle = DstLinear
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? TextureSwizzle.Pitch
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: TextureSwizzle.BlockLinear;
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int DstBlockHeight = 1 << ((DstBlkDim >> 4) & 0xf);
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long Tag = Vmm.GetPhysicalAddress(MakeInt64From2xInt32(NvGpuEngine2dReg.SrcAddress));
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long SrcAddress = MakeInt64From2xInt32(NvGpuEngine2dReg.SrcAddress);
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long DstAddress = MakeInt64From2xInt32(NvGpuEngine2dReg.DstAddress);
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bool IsFbTexture = Gpu.Engine3d.IsFrameBufferPosition(Tag);
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if (IsFbTexture && DstLinear)
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{
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DstSwizzle = TextureSwizzle.BlockLinear;
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}
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Texture DstTexture = new Texture(
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DstAddress,
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DstWidth,
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DstHeight,
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DstBlockHeight,
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DstBlockHeight,
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DstSwizzle,
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GalTextureFormat.A8B8G8R8);
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if (IsFbTexture)
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{
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Gpu.Renderer.GetFrameBufferData(Tag, (byte[] Buffer) =>
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{
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CopyTexture(Vmm, DstTexture, Buffer);
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});
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}
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else
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{
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long Size = SrcWidth * SrcHeight * 4;
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byte[] Buffer = Vmm.ReadBytes(SrcAddress, Size);
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CopyTexture(Vmm, DstTexture, Buffer);
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}
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}
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private void CopyTexture(NvGpuVmm Vmm, Texture Texture, byte[] Buffer)
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{
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TextureWriter.Write(Vmm, Texture, Buffer);
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}
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private long MakeInt64From2xInt32(NvGpuEngine2dReg Reg)
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{
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return
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(long)Registers[(int)Reg + 0] << 32 |
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(uint)Registers[(int)Reg + 1];
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}
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private void WriteRegister(NvGpuPBEntry PBEntry)
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{
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int ArgsCount = PBEntry.Arguments.Count;
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if (ArgsCount > 0)
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{
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Registers[PBEntry.Method] = PBEntry.Arguments[ArgsCount - 1];
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}
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}
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private int ReadRegister(NvGpuEngine2dReg Reg)
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{
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return Registers[(int)Reg];
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}
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private void WriteRegister(NvGpuEngine2dReg Reg, int Value)
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{
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Registers[(int)Reg] = Value;
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}
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}
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} |