2021-02-08 06:54:35 +01:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "shader_recompiler/backend/spirv/emit_spirv.h"
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2021-03-26 16:02:04 +01:00
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#include "shader_recompiler/frontend/ir/modifiers.h"
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2021-02-08 06:54:35 +01:00
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namespace Shader::Backend::SPIRV {
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2021-03-26 16:02:04 +01:00
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Id EmitCompositeConstructU32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
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const auto info{inst->Flags<IR::CompositeDecoration>()};
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if (info.is_constant) {
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return ctx.ConstantComposite(ctx.U32[2], e1, e2);
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}
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2021-02-19 22:10:18 +01:00
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return ctx.OpCompositeConstruct(ctx.U32[2], e1, e2);
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2021-02-08 06:54:35 +01:00
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
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return ctx.OpCompositeConstruct(ctx.U32[3], e1, e2, e3);
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
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return ctx.OpCompositeConstruct(ctx.U32[4], e1, e2, e3, e4);
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2021-02-08 06:54:35 +01:00
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractU32x3(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
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2021-02-08 06:54:35 +01:00
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}
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2021-03-03 07:07:19 +01:00
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Id EmitCompositeInsertU32x2(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.U32[2], object, composite, index);
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2021-02-08 06:54:35 +01:00
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}
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2021-03-03 07:07:19 +01:00
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Id EmitCompositeInsertU32x3(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.U32[3], object, composite, index);
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2021-02-08 06:54:35 +01:00
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}
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2021-03-03 07:07:19 +01:00
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Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.U32[4], object, composite, index);
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}
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2021-03-26 16:02:04 +01:00
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Id EmitCompositeConstructF16x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
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const auto info{inst->Flags<IR::CompositeDecoration>()};
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if (info.is_constant) {
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return ctx.ConstantComposite(ctx.F16[2], e1, e2);
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}
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2021-03-03 07:07:19 +01:00
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return ctx.OpCompositeConstruct(ctx.F16[2], e1, e2);
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}
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Id EmitCompositeConstructF16x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
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return ctx.OpCompositeConstruct(ctx.F16[3], e1, e2, e3);
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}
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Id EmitCompositeConstructF16x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
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return ctx.OpCompositeConstruct(ctx.F16[4], e1, e2, e3, e4);
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2021-02-08 06:54:35 +01:00
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractF16x3(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
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}
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2021-03-03 07:07:19 +01:00
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Id EmitCompositeInsertF16x2(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F16[2], object, composite, index);
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}
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2021-03-03 07:07:19 +01:00
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Id EmitCompositeInsertF16x3(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F16[3], object, composite, index);
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}
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2021-03-03 07:07:19 +01:00
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Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F16[4], object, composite, index);
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}
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2021-03-26 16:02:04 +01:00
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Id EmitCompositeConstructF32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2) {
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const auto info{inst->Flags<IR::CompositeDecoration>()};
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if (info.is_constant) {
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return ctx.ConstantComposite(ctx.F32[2], e1, e2);
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}
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return ctx.OpCompositeConstruct(ctx.F32[2], e1, e2);
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}
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Id EmitCompositeConstructF32x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
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return ctx.OpCompositeConstruct(ctx.F32[3], e1, e2, e3);
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}
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Id EmitCompositeConstructF32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
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return ctx.OpCompositeConstruct(ctx.F32[4], e1, e2, e3, e4);
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2021-02-08 06:54:35 +01:00
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractF32x3(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
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2021-02-08 06:54:35 +01:00
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}
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2021-02-19 22:10:18 +01:00
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Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index) {
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return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
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2021-02-08 06:54:35 +01:00
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}
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2021-03-03 07:07:19 +01:00
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Id EmitCompositeInsertF32x2(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F32[2], object, composite, index);
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}
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Id EmitCompositeInsertF32x3(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F32[3], object, composite, index);
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}
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Id EmitCompositeInsertF32x4(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F32[4], object, composite, index);
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}
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2021-02-17 04:59:28 +01:00
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void EmitCompositeConstructF64x2(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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2021-02-17 04:59:28 +01:00
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void EmitCompositeConstructF64x3(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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2021-02-17 04:59:28 +01:00
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void EmitCompositeConstructF64x4(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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2021-02-17 04:59:28 +01:00
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void EmitCompositeExtractF64x2(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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2021-02-17 04:59:28 +01:00
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void EmitCompositeExtractF64x3(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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2021-02-17 04:59:28 +01:00
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void EmitCompositeExtractF64x4(EmitContext&) {
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throw NotImplementedException("SPIR-V Instruction");
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}
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2021-03-03 07:07:19 +01:00
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Id EmitCompositeInsertF64x2(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F64[2], object, composite, index);
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}
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Id EmitCompositeInsertF64x3(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F64[3], object, composite, index);
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}
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Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index) {
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return ctx.OpCompositeInsert(ctx.F64[4], object, composite, index);
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}
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2021-03-26 16:02:04 +01:00
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Id EmitCompositeConstructArrayU32x2(EmitContext& ctx, IR::Inst* inst, Id e1, Id e2, Id e3, Id e4) {
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const auto info{inst->Flags<IR::CompositeDecoration>()};
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if (info.is_constant) {
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return ctx.ConstantComposite(ctx.array_U32x2, e1, e2, e3, e4);
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}
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if (ctx.profile.support_variadic_ptp) {
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return ctx.OpCompositeConstruct(ctx.array_U32x2, e1, e2, e3, e4);
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}
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return {};
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}
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2021-02-08 06:54:35 +01:00
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} // namespace Shader::Backend::SPIRV
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