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18497 commits 22 branches 3 tags 304 MiB
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19 commits

Author SHA1 Message Date
ameerj
cc55d28949 shader: Implement SHR 2021-07-22 21:51:22 -04:00
ameerj
8810c88b7e shader: Implement SEL 2021-07-22 21:51:22 -04:00
ReinUsesLisp
e87a502da2 shader: Fix control flow 2021-07-22 21:51:22 -04:00
ReinUsesLisp
9d6a98d950 shader: Implement more of XMAD and FFMA32I and fix XMAD.CBCC 2021-07-22 21:51:22 -04:00
ReinUsesLisp
e44752ddc8 shader: FMUL, select, RRO, and MUFU fixes 2021-07-22 21:51:22 -04:00
ReinUsesLisp
18a766b362 shader: Fix MOV(reg), add SHL variants and emit neg and abs instructions 2021-07-22 21:51:22 -04:00
ReinUsesLisp
274897dfd5 spirv: Fixes and Intel specific workarounds 2021-07-22 21:51:22 -04:00
ReinUsesLisp
704c6f353f shader: Rename, implement FADD.SAT and P2R (imm) 2021-07-22 21:51:22 -04:00
ReinUsesLisp
e2bc05b17d shader: Add denorm flush support 2021-07-22 21:51:22 -04:00
ReinUsesLisp
6db69990da spirv: Add lower fp16 to fp32 pass 2021-07-22 21:51:22 -04:00
ReinUsesLisp
85cce78583 shader: Primitive Vulkan integration 2021-07-22 21:51:22 -04:00
ReinUsesLisp
4b438f94cf shader: Simplify ISCADD 2021-07-22 21:51:22 -04:00
ReinUsesLisp
8af9297f09 shader: Misc fixes 2021-07-22 21:51:22 -04:00
ReinUsesLisp
9170200a11 shader: Initial implementation of an AST 2021-07-22 21:51:22 -04:00
ReinUsesLisp
16cb00c521 shader: Add pools and rename files 2021-07-22 21:51:21 -04:00
ReinUsesLisp
be94ee88d2 shader: Make typed IR 2021-07-22 21:51:21 -04:00
ReinUsesLisp
d24a16045f shader: Initial instruction support 2021-07-22 21:51:21 -04:00
ReinUsesLisp
6c4cc0cd06 shader: SSA and dominance 2021-07-22 21:51:21 -04:00
ReinUsesLisp
2d48a7b4d0 shader: Initial recompiler work 2021-07-22 21:51:21 -04:00