Commit graph

77 commits

Author SHA1 Message Date
aroulin 1484a23530 Shader JIT: Use SCALE constant from emitter 2015-09-07 16:50:28 +02:00
aroulin 87e3b9ffc0 Shader: Fix size_t to int casts of register offsets 2015-09-07 16:50:28 +02:00
bunnei 918ca40c68 Merge pull request #1088 from aroulin/x64-emitter-abi-call
x64: Proper stack alignment in shader JIT function calls
2015-09-02 08:46:58 -04:00
aroulin ba998b85a1 video_core: Fix format specifiers warnings 2015-09-02 08:20:00 +02:00
aroulin 179ad35c2e x64: Proper stack alignment in shader JIT function calls
Import Dolphin stack handling and register saving routines
Also removes the x86 parts from abi files
2015-09-01 23:39:52 +02:00
aroulin 84959be150 Shader JIT: Fix SGE/SGEI NaN behavior
SGE was incorrectly emulated w.r.t. NaN behavior as the CMPSS SSE
instruction was used with NLT
2015-08-31 08:16:15 +02:00
Yuri Kunde Schlesner c5a4025b65 Merge pull request #1065 from yuriks/shader-fp
Shader FP compliance fixes
2015-08-27 16:34:13 -07:00
aroulin f52d8c1a9b Shader JIT: Fix float to integer rounding in MOVA
MOVA converts new address register values from floats to integers using truncation
2015-08-27 15:26:41 +02:00
Yuri Kunde Schlesner d8ef20c856 Shader JIT: Tiny micro-optimization in DPH 2015-08-24 01:48:37 -03:00
Yuri Kunde Schlesner 630a850d4d Shaders: Fix multiplications between 0.0 and inf
The PICA200 semantics for multiplication are so that when multiplying
inf by exactly 0.0, the result is 0.0, instead of NaN, as defined by
IEEE. This is relied upon by games.

Fixes #1024 (missing OoT interface items)
2015-08-24 01:48:15 -03:00
Yuri Kunde Schlesner 082b74fa24 Shaders: Explicitly conform to PICA semantics in MAX/MIN 2015-08-24 01:46:58 -03:00
Yuri Kunde Schlesner 76247170df Shader JIT: Add name to second scratch register (XMM4) 2015-08-24 01:46:10 -03:00
Lioncash fa5076eb9b shader_jit: Replace two MDisp usages with MatR 2015-08-24 00:39:50 -04:00
Yuri Kunde Schlesner 455147ee95 Shader JIT: Fix CMP NaN behavior to match hardware 2015-08-24 01:29:40 -03:00
bunnei 83c214f6d8 Merge pull request #1062 from aroulin/shader-rcp-rsq
Shader: RCP and RSQ computes only the 1st component
2015-08-23 17:56:35 -04:00
aroulin fa552f11ef Shader: RCP and RSQ computes only the 1st component 2015-08-23 22:01:17 +02:00
aroulin 2f1514b904 Shader: implement DPH/DPHI in JIT 2015-08-22 11:09:53 +02:00
aroulin f3e8f42718 Shader: implement SGE, SGEI and SLT in JIT 2015-08-19 14:29:39 +02:00
aroulin 2f9eb98f03 Shader: Save caller-saved registers in JIT before a CALL 2015-08-19 03:40:07 +02:00
aroulin 7d3a6016d6 Shader: implement EX2 and LG2 in JIT 2015-08-17 01:12:34 +02:00
Tony Wasserka 33ba604fd9 Introduce a shader tracer to allow inspection of input/output values for each processed instruction. 2015-08-16 14:12:11 +02:00
bunnei db97090cad Shader: Use a POD struct for registers. 2015-08-15 18:03:27 -04:00
bunnei 0ee00861f6 Common: Cleanup CPU capability detection code. 2015-08-15 18:03:26 -04:00
bunnei a1942238f5 Common: Move cpu_detect to x64 directory. 2015-08-15 18:03:26 -04:00
bunnei bd7e691f78 x64: Refactor to remove fake interfaces and general cleanups. 2015-08-15 18:03:25 -04:00
bunnei cfb354f11f JIT: Support negative address offsets. 2015-08-15 18:01:22 -04:00
bunnei 094ae6fadb Shader: Initial implementation of x86_x64 JIT compiler for Pica vertex shaders.
- Config: Add an option for selecting to use shader JIT or interpreter.
- Qt: Add a menu option for enabling/disabling the shader JIT.
2015-08-15 18:01:07 -04:00